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Searched refs:BIFPLR5_MEM_BASE_LIMIT__MEM_BASE_31_20__SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/nbio/
Dnbio_7_2_0_sh_mask.h27656 #define BIFPLR5_MEM_BASE_LIMIT__MEM_BASE_31_20__SHIFT … macro
Dnbio_7_7_0_sh_mask.h27058 #define BIFPLR5_MEM_BASE_LIMIT__MEM_BASE_31_20__SHIFT … macro