Home
last modified time | relevance | path

Searched refs:BIFPLR1_0_LINK_STATUS2__EQUALIZATION_PHASE3_SUCCESS_8GT__SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbsd/src/sys/dev/pci/drm/amd/include/asic_reg/nbio/
Dnbio_7_2_0_sh_mask.h74553 #define BIFPLR1_0_LINK_STATUS2__EQUALIZATION_PHASE3_SUCCESS_8GT__SHIFT … macro
Dnbio_7_7_0_sh_mask.h66428 #define BIFPLR1_0_LINK_STATUS2__EQUALIZATION_PHASE3_SUCCESS_8GT__SHIFT … macro