| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 62 AssertZext, enumerator
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Hexagon/ |
| D | HexagonPatterns.td | 785 def AssertZextSD: SDNode<"ISD::AssertZext", SDTAssertZext>;
786 class AssertZext<ValueType T>: PatFrag<(ops node:$A), (AssertZextSD $A, T)>;
813 defm: Cmpb_pat <A4_cmpbeqi, seteq, AssertZext<i8>, IsUGT<8,31>, 255>;
814 defm: CmpbN_pat <A4_cmpbeqi, setne, AssertZext<i8>, IsUGT<8,31>, 255>;
815 defm: Cmpb_pat <A4_cmpbgtui, setugt, AssertZext<i8>, IsUGT<32,31>, 255>;
816 defm: CmpbN_pat <A4_cmpbgtui, setule, AssertZext<i8>, IsUGT<32,31>, 255>;
817 defm: Cmpb_pat <A4_cmphgtui, setugt, AssertZext<i16>, IsUGT<32,31>, 65535>;
818 defm: CmpbN_pat <A4_cmphgtui, setule, AssertZext<i16>, IsUGT<32,31>, 65535>;
819 defm: CmpbND_pat<A4_cmpbgtui, setult, AssertZext<i8>, IsUGT<32,32>, 255>;
820 defm: CmpbND_pat<A4_cmphgtui, setult, AssertZext<i16>, IsUGT<32,32>, 65535>;
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| D | HexagonISelDAGToDAG.cpp | 1587 case ISD::AssertZext: in keepsLowBits()
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| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 112 case ISD::AssertZext: return "AssertZext"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 60 case ISD::AssertZext: Res = PromoteIntRes_AssertZext(N); break; in PromoteIntegerResult()
305 return DAG.getNode(ISD::AssertZext, SDLoc(N), in PromoteIntRes_AssertZext()
712 ? ISD::AssertZext in PromoteIntRes_FP_TO_XINT()
2420 case ISD::AssertZext: ExpandIntRes_AssertZext(N, Lo, Hi); break; in ExpandIntegerResult()
3245 Hi = DAG.getNode(ISD::AssertZext, dl, NVT, Hi, in ExpandIntRes_AssertZext()
3249 Lo = DAG.getNode(ISD::AssertZext, dl, NVT, Lo, DAG.getValueType(EVT)); in ExpandIntRes_AssertZext()
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| D | LegalizeVectorOps.cpp | 680 NewOpc = ISD::AssertZext; in PromoteFP_TO_INT()
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| D | SelectionDAGBuilder.cpp | 907 Parts[i] = DAG.getNode(isSExt ? ISD::AssertSext : ISD::AssertZext, dl, in getCopyFromRegs()
5544 case ISD::AssertZext: in getUnderlyingArgRegs()
9485 SDValue ZExt = DAG.getNode(ISD::AssertZext, SL, Op.getValueType(), Op, in lowerRangeToAssertZExt()
10241 AssertOp = ISD::AssertZext; in LowerCallTo()
10795 AssertOp = ISD::AssertZext; in LowerArguments()
10835 if (Res.getOpcode() == ISD::AssertZext) in LowerArguments()
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| D | SelectionDAGISel.cpp | 2880 case ISD::AssertZext: in SelectCodeCommon()
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| D | SelectionDAG.cpp | 3568 case ISD::AssertZext: { in computeKnownBits()
4022 case ISD::AssertZext: in ComputeNumSignBits()
4734 case ISD::AssertZext: in canCreateUndefOrPoison()
6303 case ISD::AssertZext: { in getNode()
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| D | LegalizeDAG.cpp | 766 Result = DAG.getNode(ISD::AssertZext, dl, in LegalizeLoadOps()
2817 LHS = DAG.getNode(ISD::AssertZext, dl, OuterType, Res, in ExpandNode()
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| D | TargetLowering.cpp | 97 if (Value->getOpcode() == ISD::AssertZext) in parametersInCSRMatch()
2419 case ISD::AssertZext: { in SimplifyDemandedBits()
4605 if (Op0.getOpcode() == ISD::AssertZext && in SimplifySetCC()
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| D | DAGCombiner.cpp | 1307 case ISD::AssertZext: in PromoteOperand()
1309 return DAG.getNode(ISD::AssertZext, DL, PVT, Op0, Op.getOperand(1)); in PromoteOperand()
1760 case ISD::AssertZext: return visitAssertExt(N); in visit()
5900 case ISD::AssertZext: { in SearchForAndLoads()
5903 EVT VT = Op.getOpcode() == ISD::AssertZext ? in SearchForAndLoads()
13191 Opcode == ISD::AssertZext) { in visitAssertExt()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 344 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerFormalArguments()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 1739 unsigned Opc = Arg->Flags.isZExt() ? ISD::AssertZext : ISD::AssertSext; in convertArgType()
2530 Arg = DAG.getNode(ISD::AssertZext, DL, Arg.getValueType(), Arg, in LowerFormalArguments()
2567 Val = DAG.getNode(ISD::AssertZext, DL, VT, Val, in LowerFormalArguments()
2586 Val = DAG.getNode(ISD::AssertZext, DL, VT, Val, in LowerFormalArguments()
2767 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
6192 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, Param, in lowerImplicitZextParam()
6833 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, Val, in lowerWorkitemID()
9688 SDValue Ext = DAG.getNode(ISD::AssertZext, SL, VT, BFE, in performAndCombine()
11885 if (Op.getOpcode() == ISD::AssertZext) in isFrameIndexOp()
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| D | AMDGPUISelLowering.cpp | 539 ISD::FABS, ISD::AssertZext, in AMDGPUTargetLowering()
4270 case ISD::AssertZext: in PerformDAGCombine()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 470 ArgValue = DAG.getNode(ISD::AssertZext, DL, RegVT, ArgValue, in LowerCCCArguments()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 482 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
829 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 664 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerCCCArguments()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 484 ISD::OR, ISD::ADD, ISD::SUB, ISD::AssertZext, ISD::SHL}); in MipsTargetLowering()
3544 Val = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Val, in LowerCallResult()
3606 Val = DAG.getNode(ISD::AssertZext, DL, LocVT, Val, DAG.getValueType(ValVT)); in UnpackFromArgumentSlot()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 663 Arg = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
1445 RV = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), RV, in LowerCall_64()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/X86/ |
| D | X86InstrCompiler.td | 1485 // be copying from a truncate. AssertSext/AssertZext/AssertAlign aren't saying
1494 N->getOpcode() != ISD::AssertZext &&
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 1380 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 1379 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value, in convertLocVTToValVT()
4347 SDValue OrigVal = DAG.getNode(ISD::AssertZext, DL, WideVT, AtomicOp.getValue(0), in lowerATOMIC_CMP_SWAP()
6479 else if (LHS->getOpcode() == ISD::AssertZext) in combineSTORE()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 1644 case ISD::AssertZext: { in getValueBits()
3037 (Input.getOperand(0).getOpcode() == ISD::AssertZext || in zeroExtendInputIfNeeded()
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| /openbsd/src/gnu/llvm/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 746 def assertzext : SDNode<"ISD::AssertZext", SDT_assert>;
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