Searched refs:AsmName (Results 1 – 9 of 9) sorted by relevance
| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/ |
| D | VERegisterInfo.td | 56 def AsmName : RegAltNameIndex;
101 let RegAltNameIndices = [AsmName] in {
167 } // RegAltNameIndices = [AsmName]
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| /openbsd/src/gnu/llvm/llvm/utils/TableGen/ |
| D | AsmWriterEmitter.cpp | 560 std::string &AsmName = AsmNames[i++]; in emitRegisterNameString() local
565 AsmName = std::string(Reg.TheDef->getValueAsString("AsmName")); in emitRegisterNameString()
566 if (AsmName.empty()) in emitRegisterNameString()
567 AsmName = std::string(Reg.getName()); in emitRegisterNameString()
586 AsmName = std::string(AltNames[Idx]); in emitRegisterNameString()
589 StringTable.add(AsmName); in emitRegisterNameString()
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| D | CodeGenRegisters.cpp | 658 StringInit *AsmName = StringInit::get(RK, ""); in expand() local
664 AsmName = StringInit::get(RK, RegNames[n]); in expand()
695 RV.setValue(AsmName); in expand()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVRegisterInfo.td | 29 let AsmName = subreg.AsmName;
33 // Because RISCVReg64 register have AsmName and AltNames that alias with their
41 let AsmName = subreg.AsmName;
549 def X#Index#_PD : RISCVRegWithSubRegs<Index, Reg.AsmName,
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| /openbsd/src/gnu/llvm/llvm/lib/Target/VE/MCTargetDesc/ |
| D | VEInstPrinter.cpp | 32 unsigned AltIdx = VE::AsmName; in printRegName()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| D | VOP3Instructions.td | 1228 multiclass VOP3_F16_Real_gfx9<bits<10> op, string OpName, string AsmName> {
1232 let AsmString = AsmName # ps.AsmOperands;
1236 multiclass VOP3OpSel_F16_Real_gfx9<bits<10> op, string AsmName> {
1240 let AsmString = AsmName # ps.AsmOperands;
1244 multiclass VOP3Interp_F16_Real_gfx9<bits<10> op, string OpName, string AsmName> {
1248 let AsmString = AsmName # ps.AsmOperands;
1252 multiclass VOP3_Real_gfx9<bits<10> op, string AsmName> {
1256 let AsmString = AsmName # ps.AsmOperands;
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| D | VOP2Instructions.td | 2032 multiclass VOP2be_Real_e32e64_vi_only <bits<6> op, string OpName, string AsmName> {
2037 let AsmString = AsmName # ps.AsmOperands;
2044 let AsmString = AsmName # ps.AsmOperands;
2052 let AsmString = AsmName # ps.AsmOperands;
2059 let AsmString = AsmName # ps.AsmOperands;
2066 multiclass VOP2be_Real_e32e64_gfx9 <bits<6> op, string OpName, string AsmName> {
2071 let AsmString = AsmName # ps.AsmOperands;
2078 let AsmString = AsmName # ps.AsmOperands;
2086 let AsmString = AsmName # ps.AsmOperands;
2093 let AsmString = AsmName # ps.AsmOperands;
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| /openbsd/src/gnu/llvm/llvm/docs/ |
| D | WritingAnLLVMBackend.rst | 352 string AsmName = n;
396 const char *AsmName; // Assembly language name for the register
405 names for the register (in the ``AsmName`` and ``Name`` fields of
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| /openbsd/src/gnu/llvm/llvm/include/llvm/Target/ |
| D | Target.td | 133 string AsmName = n;
384 // the AsmName and Dwarf numbers are cleared.
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