| /openbsd/src/gnu/llvm/llvm/include/llvm/Support/ |
| D | Allocator.h | 186 uintptr_t AlignedAddr = alignAddr(NewSlab, Alignment); in Allocate() local
187 assert(AlignedAddr + Size <= (uintptr_t)NewSlab + PaddedSize); in Allocate()
188 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
196 uintptr_t AlignedAddr = alignAddr(CurPtr, Alignment); in Allocate() local
197 assert(AlignedAddr + SizeToAllocate <= (uintptr_t)End && in Allocate()
199 char *AlignedPtr = (char*)AlignedAddr; in Allocate()
|
| /openbsd/src/gnu/llvm/llvm/lib/CodeGen/ |
| D | AtomicExpandPass.cpp | 646 Value *AlignedAddr = nullptr; member
669 PrintObj(PMV.AlignedAddr); in operator <<()
718 PMV.AlignedAddr = Addr; in createMaskInstrs()
735 PMV.AlignedAddr = Builder.CreateIntrinsic( in createMaskInstrs()
744 PMV.AlignedAddr = Addr; in createMaskInstrs()
765 PMV.AlignedAddr = in createMaskInstrs()
766 Builder.CreateBitCast(PMV.AlignedAddr, WordPtrType, "AlignedAddr"); in createMaskInstrs()
887 OldResult = insertRMWCmpXchgLoop(Builder, PMV.WordType, PMV.AlignedAddr, in expandPartwordAtomicRMW()
892 OldResult = insertRMWLLSCLoop(Builder, PMV.WordType, PMV.AlignedAddr, in expandPartwordAtomicRMW()
928 Builder.CreateAtomicRMW(Op, PMV.AlignedAddr, NewOperand, in widenPartwordAtomicRMW()
[all …]
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/RISCV/ |
| D | RISCVISelLowering.h | 553 Value *AlignedAddr, Value *Incr,
560 Value *AlignedAddr, Value *CmpVal,
|
| D | RISCVISelLowering.cpp | 13846 IRBuilderBase &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
13851 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicRMWIntrinsic()
13877 {AlignedAddr, Incr, Mask, SextShamt, Ordering}); in emitMaskedAtomicRMWIntrinsic()
13880 Builder.CreateCall(LrwOpScwLoop, {AlignedAddr, Incr, Mask, Ordering}); in emitMaskedAtomicRMWIntrinsic()
13902 IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
13913 Type *Tys[] = {AlignedAddr->getType()}; in emitMaskedAtomicCmpXchgIntrinsic()
13917 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
|
| /openbsd/src/gnu/llvm/compiler-rt/lib/sanitizer_common/tests/ |
| D | sanitizer_allocator_test.cpp | 291 AlignedAddr = RoundUpTo(reinterpret_cast<uptr>(BasePtr), kAllocatorSize); in ScopedPremappedHeap()
296 uptr Addr() { return AlignedAddr; } in Addr()
300 uptr AlignedAddr; member in ScopedPremappedHeap
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 929 AtomicRMWInst *AI, Value *AlignedAddr,
935 Value *AlignedAddr, Value *CmpVal,
|
| D | PPCISelLowering.cpp | 18389 IRBuilderBase &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
18402 Builder.CreateBitCast(AlignedAddr, Type::getInt8PtrTy(M->getContext())); in emitMaskedAtomicRMWIntrinsic()
18413 IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
18429 Builder.CreateBitCast(AlignedAddr, Type::getInt8PtrTy(M->getContext())); in emitMaskedAtomicCmpXchgIntrinsic()
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 1668 Register AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicBinaryPartword() local
1787 BuildMI(BB, DL, TII->get(ABI.GetPtrAndOp()), AlignedAddr) in emitAtomicBinaryPartword()
1814 .addReg(AlignedAddr) in emitAtomicBinaryPartword()
1917 Register AlignedAddr = RegInfo.createVirtualRegister(RCp); in emitAtomicCmpSwapPartword() local
1974 BuildMI(BB, DL, TII->get(ArePtrs64bit ? Mips::AND64 : Mips::AND), AlignedAddr) in emitAtomicCmpSwapPartword()
2006 .addReg(AlignedAddr) in emitAtomicCmpSwapPartword()
|
| /openbsd/src/gnu/llvm/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 2015 Value *AlignedAddr, Value *Incr, in emitMaskedAtomicRMWIntrinsic() argument
2050 IRBuilderBase &Builder, AtomicCmpXchgInst *CI, Value *AlignedAddr, in emitMaskedAtomicCmpXchgIntrinsic() argument
|
| /openbsd/src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 4207 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_LOAD_OP() local
4236 SDValue Ops[] = { ChainIn, AlignedAddr, Src2, BitShift, NegBitShift, in lowerATOMIC_LOAD_OP()
4323 SDValue AlignedAddr = DAG.getNode(ISD::AND, DL, PtrVT, Addr, in lowerATOMIC_CMP_SWAP() local
4339 SDValue Ops[] = { ChainIn, AlignedAddr, CmpVal, SwapVal, BitShift, in lowerATOMIC_CMP_SWAP()
|