| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRELFObjectWriter.cpp | 81 case AVR::fixup_32: in getRelocType() 83 case AVR::fixup_7_pcrel: in getRelocType() 85 case AVR::fixup_13_pcrel: in getRelocType() 87 case AVR::fixup_16: in getRelocType() 89 case AVR::fixup_16_pm: in getRelocType() 91 case AVR::fixup_lo8_ldi: in getRelocType() 93 case AVR::fixup_hi8_ldi: in getRelocType() 95 case AVR::fixup_hh8_ldi: in getRelocType() 97 case AVR::fixup_lo8_ldi_neg: in getRelocType() 99 case AVR::fixup_hi8_ldi_neg: in getRelocType() [all …]
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| D | AVRELFStreamer.cpp | 17 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet() 19 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet() 21 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet() 23 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet() 25 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet() 27 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet() 29 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet() 31 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet() 33 else if (Features[AVR::ELFArchAVR51]) in getEFlagsForFeatureSet() 35 else if (Features[AVR::ELFArchAVR6]) in getEFlagsForFeatureSet() [all …]
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| D | AVRMCExpr.cpp | 149 AVR::Fixups AVRMCExpr::getFixupKind() const { in getFixupKind() 150 AVR::Fixups Kind = AVR::Fixups::LastTargetFixupKind; in getFixupKind() 154 Kind = isNegated() ? AVR::fixup_lo8_ldi_neg : AVR::fixup_lo8_ldi; in getFixupKind() 157 Kind = isNegated() ? AVR::fixup_hi8_ldi_neg : AVR::fixup_hi8_ldi; in getFixupKind() 160 Kind = isNegated() ? AVR::fixup_hh8_ldi_neg : AVR::fixup_hh8_ldi; in getFixupKind() 163 Kind = isNegated() ? AVR::fixup_ms8_ldi_neg : AVR::fixup_ms8_ldi; in getFixupKind() 167 Kind = isNegated() ? AVR::fixup_lo8_ldi_pm_neg : AVR::fixup_lo8_ldi_pm; in getFixupKind() 170 Kind = isNegated() ? AVR::fixup_hi8_ldi_pm_neg : AVR::fixup_hi8_ldi_pm; in getFixupKind() 173 Kind = isNegated() ? AVR::fixup_hh8_ldi_pm_neg : AVR::fixup_hh8_ldi_pm; in getFixupKind() 177 Kind = AVR::fixup_16_pm; in getFixupKind() [all …]
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| D | AVRAsmBackend.cpp | 84 AVR::fixups::adjustBranchTarget(Value); in adjustBranch() 95 AVR::fixups::adjustBranchTarget(Value); in adjustRelativeBranch() 262 case AVR::fixup_7_pcrel: in adjustFixupValue() 265 case AVR::fixup_13_pcrel: in adjustFixupValue() 268 case AVR::fixup_call: in adjustFixupValue() 271 case AVR::fixup_ldi: in adjustFixupValue() 274 case AVR::fixup_lo8_ldi: in adjustFixupValue() 277 case AVR::fixup_lo8_ldi_pm: in adjustFixupValue() 278 case AVR::fixup_lo8_ldi_gs: in adjustFixupValue() 282 case AVR::fixup_hi8_ldi: in adjustFixupValue() [all …]
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| D | AVRInstPrinter.cpp | 44 case AVR::LDRdPtr: in printInst() 45 case AVR::LDRdPtrPi: in printInst() 46 case AVR::LDRdPtrPd: in printInst() 51 if (Opcode == AVR::LDRdPtrPd) in printInst() 56 if (Opcode == AVR::LDRdPtrPi) in printInst() 59 case AVR::STPtrRr: in printInst() 65 case AVR::STPtrPiRr: in printInst() 66 case AVR::STPtrPdRr: in printInst() 69 if (Opcode == AVR::STPtrPdRr) in printInst() 74 if (Opcode == AVR::STPtrPiRr) in printInst() [all …]
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| D | AVRMCCodeEmitter.cpp | 77 bool IsRegX = MI.getOperand(0).getReg() == AVR::R27R26 || in loadStorePostEncoder() 78 MI.getOperand(1).getReg() == AVR::R27R26; in loadStorePostEncoder() 80 bool IsPredec = Opcode == AVR::LDRdPtrPd || Opcode == AVR::STPtrPdRr; in loadStorePostEncoder() 81 bool IsPostinc = Opcode == AVR::LDRdPtrPi || Opcode == AVR::STPtrPiRr; in loadStorePostEncoder() 91 template <AVR::Fixups Fixup> 109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget() 122 case AVR::R27R26: in encodeLDSTPtrReg() 124 case AVR::R29R28: in encodeLDSTPtrReg() 126 case AVR::R31R30: in encodeLDSTPtrReg() 150 case AVR::R31R30: in encodeMemri() [all …]
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/ |
| D | AVRInstrInfo.cpp | 39 : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI() {} in AVRInstrInfo() 49 if (AVR::DREGSRegClass.contains(DestReg, SrcReg)) { in copyPhysReg() 52 if (STI.hasMOVW() && AVR::DREGSMOVWRegClass.contains(DestReg, SrcReg)) { in copyPhysReg() 53 BuildMI(MBB, MI, DL, get(AVR::MOVWRdRr), DestReg) in copyPhysReg() 62 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestHi) in copyPhysReg() 64 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestLo) in copyPhysReg() 67 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestLo) in copyPhysReg() 69 BuildMI(MBB, MI, DL, get(AVR::MOVRdRr), DestHi) in copyPhysReg() 74 if (AVR::GPR8RegClass.contains(DestReg, SrcReg)) { in copyPhysReg() 75 Opc = AVR::MOVRdRr; in copyPhysReg() [all …]
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| D | AVRRegisterInfo.cpp | 61 Reserved.set(AVR::R0); in getReservedRegs() 62 Reserved.set(AVR::R1); in getReservedRegs() 63 Reserved.set(AVR::R1R0); in getReservedRegs() 66 Reserved.set(AVR::SPL); in getReservedRegs() 67 Reserved.set(AVR::SPH); in getReservedRegs() 68 Reserved.set(AVR::SP); in getReservedRegs() 73 for (unsigned Reg = AVR::R2; Reg <= AVR::R17; Reg++) in getReservedRegs() 76 for (unsigned Reg = AVR::R3R2; Reg <= AVR::R18R17; Reg++) in getReservedRegs() 89 Reserved.set(AVR::R28); in getReservedRegs() 90 Reserved.set(AVR::R29); in getReservedRegs() [all …]
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| D | AVRFrameLowering.cpp | 64 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs)) in emitPrologue() 72 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue() 76 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), STI.getTmpRegister()) in emitPrologue() 79 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue() 83 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue() 86 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue() 105 (MBBI->getOpcode() == AVR::PUSHRr || MBBI->getOpcode() == AVR::PUSHWRr)) { in emitPrologue() 110 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue() 111 .addReg(AVR::SP) in emitPrologue() 116 MBBJ.addLiveIn(AVR::R29R28); in emitPrologue() [all …]
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| D | AVRExpandPseudoInsts.cpp | 217 if (Op == AVR::ANDIRdK && ImmVal == 0xff) in isLogicImmOpRedundant() 221 if (Op == AVR::ORIRdK && ImmVal == 0x0) in isLogicImmOpRedundant() 266 bool AVRExpandPseudo::expand<AVR::ADDWRdRr>(Block &MBB, BlockIt MBBI) { in expand() 267 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI); in expand() 271 bool AVRExpandPseudo::expand<AVR::ADCWRdRr>(Block &MBB, BlockIt MBBI) { in expand() 272 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI); in expand() 276 bool AVRExpandPseudo::expand<AVR::SUBWRdRr>(Block &MBB, BlockIt MBBI) { in expand() 277 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI); in expand() 281 bool AVRExpandPseudo::expand<AVR::SUBIWRdK>(Block &MBB, BlockIt MBBI) { in expand() 291 buildMI(MBB, MBBI, AVR::SUBIRdK) in expand() [all …]
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| D | AVRISelLowering.cpp | 40 addRegisterClass(MVT::i8, &AVR::GPR8RegClass); in AVRTargetLowering() 41 addRegisterClass(MVT::i16, &AVR::DREGSRegClass); in AVRTargetLowering() 49 setStackPointerRegisterToSaveRestore(AVR::SP); in AVRTargetLowering() 1019 if (isa<PointerType>(Ty) && AS == AVR::ProgramMemory) { in isLegalAddressingMode() 1050 if (AVR::isProgramMemoryAccess(LD)) { in getPreIndexedAddressParts() 1056 if (AVR::isProgramMemoryAccess(ST)) { in getPreIndexedAddressParts() 1107 if (AVR::isProgramMemoryAccess(ST)) { in getPostIndexedAddressParts() 1154 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20, 1155 AVR::R19, AVR::R18, AVR::R17, AVR::R16, AVR::R15, AVR::R14, 1156 AVR::R13, AVR::R12, AVR::R11, AVR::R10, AVR::R9, AVR::R8}; [all …]
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| D | AVRTargetObjectFile.cpp | 43 if (AVR::isProgramMemoryAddress(GO) && !GO->hasSection() && in SelectSectionForGlobal() 56 AVR::getAddressSpace(GO) != AVR::ProgramMemory) { in SelectSectionForGlobal() 63 switch (AVR::getAddressSpace(GO)) { in SelectSectionForGlobal() 64 case AVR::ProgramMemory: // address space 1 in SelectSectionForGlobal() 66 case AVR::ProgramMemory1: // address space 2 in SelectSectionForGlobal() 68 case AVR::ProgramMemory2: // address space 3 in SelectSectionForGlobal() 70 case AVR::ProgramMemory3: // address space 4 in SelectSectionForGlobal() 72 case AVR::ProgramMemory4: // address space 5 in SelectSectionForGlobal() 74 case AVR::ProgramMemory5: // address space 6 in SelectSectionForGlobal()
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| D | AVRISelDAGToDAG.cpp | 153 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad() 161 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad() 192 Opcode = AVR::LPMRdZPi; in selectIndexedProgMemLoad() 218 RI.getRegClass(RegNode->getReg()) == &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand() 251 AVR::PTRDISPREGSRegClass.contains(Reg)); in SelectInlineAsmMemoryOperand() 261 if (RI.getRegClass(Reg) != &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand() 264 Register VReg = RI.createVirtualRegister(&AVR::PTRDISPREGSRegClass); in SelectInlineAsmMemoryOperand() 294 Register VReg = RI.createVirtualRegister(&AVR::PTRDISPREGSRegClass); in SelectInlineAsmMemoryOperand() 314 CurDAG->SelectNodeTo(N, AVR::FRMIDX, getTargetLowering()->getPointerTy(DL), in select() 333 if (!RN || (RN->getReg() != AVR::SP)) { in select() [all …]
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| D | AVRRegisterInfo.td | 1 //===-- AVRRegisterInfo.td - AVR Register defs -------------*- tablegen -*-===// 10 // Declarations that describe the AVR register file 19 let Namespace = "AVR"; 25 let Namespace = "AVR" in { 30 let Namespace = "AVR" in { def ptr : RegAltNameIndex; } 114 def GPR8 : RegisterClass<"AVR", [i8], 8, 125 def GPR8lo : RegisterClass<"AVR", [i8], 8, 130 def LD8 : RegisterClass<"AVR", [i8], 8, 140 def LD8lo : RegisterClass<"AVR", [i8], 8, 144 def DREGS : RegisterClass<"AVR", [i16], 8, [all …]
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| D | AVR.td | 1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===// 8 // This is the top level entry point for the AVR target. 18 // AVR Device Definitions 73 def AVR : Target {
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| D | README.md | 1 # AVR backend 3 This experimental backend is for the 8-bit Atmel [AVR](https://en.wikipedia.org/wiki/Atmel_AVR) mic… 7 * [Unresolved bugs](https://llvm.org/bugs/buglist.cgi?product=libraries&component=Backend%3A%20AVR&…
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| D | AVRSubtarget.h | 108 return hasTinyEncoding() ? AVR::R16 : AVR::R0; in getTmpRegister() 111 return hasTinyEncoding() ? AVR::R17 : AVR::R1; in getZeroRegister()
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| D | AVRCallingConv.td | 1 //===-- AVRCallingConv.td - Calling Conventions for AVR ----*- tablegen -*-===// 8 // This describes the calling conventions for AVR architecture. 13 // AVR Return Value Calling Convention 23 // AVR Argument Calling Conventions
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| D | AVRAsmPrinter.cpp | 136 Reg = TRI.getSubReg(Reg, ByteNumber % BytesPerReg ? AVR::sub_hi in PrintAsmOperand() 137 : AVR::sub_lo); in PrintAsmOperand() 172 if (MI->getOperand(OpNum).getReg() == AVR::R31R30) { in PrintAsmMemoryOperand() 174 } else if (MI->getOperand(OpNum).getReg() == AVR::R29R28) { in PrintAsmMemoryOperand() 176 } else if (MI->getOperand(OpNum).getReg() == AVR::R27R26) { in PrintAsmMemoryOperand() 188 assert(MI->getOperand(OpNum).getReg() != AVR::R27R26 && in PrintAsmMemoryOperand() 212 bool IsProgMem = GV->getAddressSpace() == AVR::ProgramMemory; in lowerConstant()
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/Disassembler/ |
| D | AVRDisassembler.cpp | 60 AVR::R0, AVR::R1, AVR::R2, AVR::R3, AVR::R4, AVR::R5, AVR::R6, 61 AVR::R7, AVR::R8, AVR::R9, AVR::R10, AVR::R11, AVR::R12, AVR::R13, 62 AVR::R14, AVR::R15, AVR::R16, AVR::R17, AVR::R18, AVR::R19, AVR::R20, 63 AVR::R21, AVR::R22, AVR::R23, AVR::R24, AVR::R25, AVR::R26, AVR::R27, 64 AVR::R28, AVR::R29, AVR::R30, AVR::R31, 192 Inst.addOperand(MCOperand::createReg(AVR::R31R30)); in decodeFLPMX() 264 MCOperand::createReg((Insn & 0x40) ? AVR::R29R28 : AVR::R31R30)); in decodeMemri() 276 Inst.setOpcode(AVR::RJMPk); in decodeFBRk() 279 Inst.setOpcode(AVR::RCALLk); in decodeFBRk() 298 unsigned RegBase = (Insn & 0x8) ? AVR::R29R28 : AVR::R31R30; in decodeLoadStore() [all …]
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| /openbsd/src/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | BUILD.gn | 6 td_file = "../AVR.td" 12 td_file = "../AVR.td" 18 td_file = "../AVR.td" 24 td_file = "../AVR.td" 30 td_file = "../AVR.td" 49 "//llvm/lib/Target/AVR/TargetInfo",
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| /openbsd/src/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/ |
| D | BUILD.gn | 6 td_file = "../AVR.td" 15 "//llvm/lib/Target/AVR:LLVMAVRCodeGen", 16 "//llvm/lib/Target/AVR/MCTargetDesc", 17 "//llvm/lib/Target/AVR/TargetInfo",
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| /openbsd/src/gnu/llvm/llvm/lib/Target/AVR/AsmParser/ |
| D | AVRAsmParser.cpp | 83 unsigned toDREG(unsigned Reg, unsigned From = AVR::sub_lo) { in toDREG() 84 MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID]; in toDREG() 359 if (RegNum == AVR::NoRegister) { in parseRegisterName() 362 if (RegNum == AVR::NoRegister) { in parseRegisterName() 372 if (RegNum == AVR::NoRegister) in parseRegisterName() 379 int RegNum = AVR::NoRegister; in parseRegister() 393 if (RegNum == AVR::NoRegister && RestoreOnFailure) { in parseRegister() 407 if (RegNo == AVR::NoRegister) in tryParseRegisterOperand() 411 if (AVR::R0 <= RegNo && RegNo <= AVR::R15 && in tryParseRegisterOperand() 412 STI.hasFeature(AVR::FeatureTinyEncoding)) in tryParseRegisterOperand() [all …]
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| /openbsd/src/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/AVR/AsmParser/ |
| D | BUILD.gn | 6 td_file = "../AVR.td" 16 "//llvm/lib/Target/AVR/MCTargetDesc", 17 "//llvm/lib/Target/AVR/TargetInfo",
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| /openbsd/src/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/AVR/ |
| D | BUILD.gn | 6 td_file = "AVR.td" 12 td_file = "AVR.td" 48 # having the directory's name, "//llvm/lib/Target/AVR" will refer to this 53 group("AVR") {
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