Searched refs:AMDGPU_MAX_RINGS (Results 1 – 11 of 11) sorted by relevance
617 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_fini()649 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_isr_toggle()667 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_sw_fini()706 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_fence_driver_hw_init()924 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_fence_info_show()
441 unsigned seqno[AMDGPU_MAX_RINGS];452 struct drm_gpu_scheduler *vm_pte_scheds[AMDGPU_MAX_RINGS];
1678 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1694 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_debugfs_test_ib_show()1919 if (val >= AMDGPU_MAX_RINGS) in amdgpu_debugfs_ib_preempt()2076 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_debugfs_init()
2759 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_init_schedulers()4123 adev->fence_context = dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_device_init()5293 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_has_job_running()5434 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_pre_asic_reset()5934 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()6011 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_device_gpu_recover()6387 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_error_detected()6528 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) { in amdgpu_pci_resume()
40 #define AMDGPU_MAX_RINGS 124 macro
223 if (adev->num_rings >= AMDGPU_MAX_RINGS) in amdgpu_ring_init()
145 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in aqua_vanjaram_xcp_sched_list_update()
2773 dma_fence_context_alloc(AMDGPU_MAX_RINGS); in amdgpu_vm_manager_init()2774 for (i = 0; i < AMDGPU_MAX_RINGS; ++i) in amdgpu_vm_manager_init()
997 struct amdgpu_ring *rings[AMDGPU_MAX_RINGS];
2759 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_pmops_runtime_suspend()
540 for (i = 0; i < AMDGPU_MAX_RINGS; i++) { in amdgpu_dpm_compute_clocks()