Searched refs:rl78_bit_insn (Results 1 – 3 of 3) sorted by relevance
91 static int rl78_bit_insn = 0; variable1159 andor1 : AND1 { $$ = 0x05; rl78_bit_insn = 1; }1160 | OR1 { $$ = 0x06; rl78_bit_insn = 1; }1161 | XOR1 { $$ = 0x07; rl78_bit_insn = 1; }1164 bt_bf : BT { $$ = 0x02; rl78_bit_insn = 1; rl78_linkrelax_branch (); }1165 | BF { $$ = 0x04; rl78_bit_insn = 1; rl78_linkrelax_branch (); }1166 | BTCLR { $$ = 0x00; rl78_bit_insn = 1; }1169 setclr1 : SET1 { $$ = 0; rl78_bit_insn = 1; }1170 | CLR1 { $$ = 1; rl78_bit_insn = 1; }1189 mov1 : MOV1 { rl78_bit_insn = 1; }[all …]
149 static int rl78_bit_insn = 0; variable4141 { (yyval.regno) = 0x05; rl78_bit_insn = 1; } in yyparse()4147 { (yyval.regno) = 0x06; rl78_bit_insn = 1; } in yyparse()4153 { (yyval.regno) = 0x07; rl78_bit_insn = 1; } in yyparse()4159 { (yyval.regno) = 0x02; rl78_bit_insn = 1; rl78_linkrelax_branch (); } in yyparse()4165 { (yyval.regno) = 0x04; rl78_bit_insn = 1; rl78_linkrelax_branch (); } in yyparse()4171 { (yyval.regno) = 0x00; rl78_bit_insn = 1; } in yyparse()4177 { (yyval.regno) = 0; rl78_bit_insn = 1; } in yyparse()4183 { (yyval.regno) = 1; rl78_bit_insn = 1; } in yyparse()4237 { rl78_bit_insn = 1; } in yyparse()[all …]
29 * config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit