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Searched refs:phy (Results 1 – 25 of 318) sorted by relevance

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/netbsd/src/sys/dev/pci/cxgb/
Dcxgb_ael1002.c51 static void ael100x_txon(struct cphy *phy) in ael100x_txon() argument
53 int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL; in ael100x_txon()
56 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio); in ael100x_txon()
60 static int ael1002_power_down(struct cphy *phy, int enable) in ael1002_power_down() argument
64 err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable); in ael1002_power_down()
66 err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR, in ael1002_power_down()
71 static int ael1002_reset(struct cphy *phy, int wait) in ael1002_reset() argument
75 if ((err = ael1002_power_down(phy, 0)) || in ael1002_reset()
76 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) || in ael1002_reset()
77 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) || in ael1002_reset()
[all …]
Dcxgb_common.h159 void (*phy_prep)(struct cphy *phy, adapter_t *adapter, int phy_addr,
510 void (*destroy)(struct cphy *phy);
511 int (*reset)(struct cphy *phy, int wait);
513 int (*intr_enable)(struct cphy *phy);
514 int (*intr_disable)(struct cphy *phy);
515 int (*intr_clear)(struct cphy *phy);
516 int (*intr_handler)(struct cphy *phy);
518 int (*autoneg_enable)(struct cphy *phy);
519 int (*autoneg_restart)(struct cphy *phy);
521 int (*advertise)(struct cphy *phy, unsigned int advertise_map);
[all …]
/netbsd/src/sys/dev/pci/ixgbe/
Dixgbe_phy.c120 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
197 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_combined_generic_int()
257 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_generic() local
262 phy->ops.identify = ixgbe_identify_phy_generic; in ixgbe_init_phy_ops_generic()
263 phy->ops.reset = ixgbe_reset_phy_generic; in ixgbe_init_phy_ops_generic()
264 phy->ops.read_reg = ixgbe_read_phy_reg_generic; in ixgbe_init_phy_ops_generic()
265 phy->ops.write_reg = ixgbe_write_phy_reg_generic; in ixgbe_init_phy_ops_generic()
266 phy->ops.read_reg_mdi = ixgbe_read_phy_reg_mdi; in ixgbe_init_phy_ops_generic()
267 phy->ops.write_reg_mdi = ixgbe_write_phy_reg_mdi; in ixgbe_init_phy_ops_generic()
268 phy->ops.setup_link = ixgbe_setup_phy_link_generic; in ixgbe_init_phy_ops_generic()
[all …]
Dixgbe_x550.c262 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_check_cs4227()
364 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi_22()
414 (hw->phy.addr << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi_22()
465 hw->phy.type = ixgbe_phy_x550em_kx4; in ixgbe_identify_phy_x550em()
468 hw->phy.type = ixgbe_phy_x550em_xfi; in ixgbe_identify_phy_x550em()
473 hw->phy.type = ixgbe_phy_x550em_kr; in ixgbe_identify_phy_x550em()
479 hw->phy.type = ixgbe_phy_ext_1g_t; in ixgbe_identify_phy_x550em()
483 hw->phy.type = ixgbe_phy_fw; in ixgbe_identify_phy_x550em()
485 hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_x550em()
487 hw->phy.phy_semaphore_mask |= IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_x550em()
[all …]
Dixgbe_82598.c128 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_ops_82598() local
137 phy->ops.init = ixgbe_init_phy_ops_82598; in ixgbe_init_ops_82598()
170 phy->ops.read_i2c_eeprom = ixgbe_read_i2c_eeprom_82598; in ixgbe_init_ops_82598()
171 phy->ops.read_i2c_sff8472 = ixgbe_read_i2c_sff8472_82598; in ixgbe_init_ops_82598()
200 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_82598() local
207 phy->ops.identify(hw); in ixgbe_init_phy_ops_82598()
216 switch (hw->phy.type) { in ixgbe_init_phy_ops_82598()
218 phy->ops.setup_link = ixgbe_setup_phy_link_tnx; in ixgbe_init_phy_ops_82598()
219 phy->ops.check_link = ixgbe_check_phy_link_tnx; in ixgbe_init_phy_ops_82598()
220 phy->ops.get_firmware_version = in ixgbe_init_phy_ops_82598()
[all …]
Dixgbe_82599.c92 if (hw->phy.multispeed_fiber) { in ixgbe_init_mac_link_ops_82599()
103 (hw->phy.smart_speed == ixgbe_smart_speed_auto || in ixgbe_init_mac_link_ops_82599()
104 hw->phy.smart_speed == ixgbe_smart_speed_on) && in ixgbe_init_mac_link_ops_82599()
125 struct ixgbe_phy_info *phy = &hw->phy; in ixgbe_init_phy_ops_82599() local
133 hw->phy.qsfp_shared_i2c_bus = TRUE; in ixgbe_init_phy_ops_82599()
145 phy->ops.read_i2c_byte = ixgbe_read_i2c_byte_82599; in ixgbe_init_phy_ops_82599()
146 phy->ops.write_i2c_byte = ixgbe_write_i2c_byte_82599; in ixgbe_init_phy_ops_82599()
149 ret_val = phy->ops.identify(hw); in ixgbe_init_phy_ops_82599()
155 if (hw->phy.sfp_type != ixgbe_sfp_type_unknown) in ixgbe_init_phy_ops_82599()
156 hw->phy.ops.reset = NULL; in ixgbe_init_phy_ops_82599()
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/netbsd/src/sys/arch/hpcmips/vr/
Dvrdmaau.c96 u_int32_t phy; in vrdmaau_set_aiuin() local
101 if ((err = vrdmaau_phy_addr(sc, addr, &phy))) in vrdmaau_set_aiuin()
104 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAH_REG_W, phy >> 16); in vrdmaau_set_aiuin()
105 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUIBAL_REG_W, phy & 0xffff); in vrdmaau_set_aiuin()
113 u_int32_t phy; in vrdmaau_set_aiuout() local
118 if ((err = vrdmaau_phy_addr(sc, addr, &phy))) in vrdmaau_set_aiuout()
121 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAH_REG_W, phy >> 16); in vrdmaau_set_aiuout()
122 bus_space_write_2(sc->sc_iot, sc->sc_ioh, AIUOBAL_REG_W, phy & 0xffff); in vrdmaau_set_aiuout()
130 u_int32_t phy; in vrdmaau_set_fir() local
135 if ((err = vrdmaau_phy_addr(sc, addr, &phy))) in vrdmaau_set_fir()
[all …]
/netbsd/src/sys/arch/sandpoint/stand/altboot/
Dwm.c112 unsigned phy, bmsr, anlpar; member
161 DPRINTF(("PHY %d (%04x.%04x)\n", l->phy, in wm_init()
162 mii_read(l, l->phy, 2), mii_read(l, l->phy, 3))); in wm_init()
167 val = mii_read(l, l->phy, 0x11); in wm_init()
354 mii_read(struct local *l, int phy, int reg) in mii_read() argument
358 data = (2U << 26) | MPHY(phy) | MREG(reg); in mii_read()
367 mii_write(struct local *l, int phy, int reg, int val) in mii_write() argument
371 data = (1U << 26) | MPHY(phy) | MREG(reg) | (val & 0xffff); in mii_write()
405 int phy, ctl, sts, bound; in mii_initphy() local
407 for (phy = 0; phy < 32; phy++) { in mii_initphy()
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Dpcn.c123 unsigned phy, bmsr, anlpar; member
175 val = pcn_mii_read(l, l->phy, 24); in pcn_init()
297 pcn_mii_read(struct local *l, int phy, int reg) in pcn_mii_read() argument
299 pcn_bcr_write(l, PCN_BCR33, MREG(reg) | MPHY(phy)); in pcn_mii_read()
304 pcn_mii_write(struct local *l, int phy, int reg, int val) in pcn_mii_write() argument
306 pcn_bcr_write(l, PCN_BCR33, MREG(reg) | MPHY(phy)); in pcn_mii_write()
348 int phy, ctl, sts, bound; in mii_initphy() local
350 for (phy = 0; phy < 32; phy++) { in mii_initphy()
351 ctl = pcn_mii_read(l, phy, MII_BMCR); in mii_initphy()
352 sts = pcn_mii_read(l, phy, MII_BMSR); in mii_initphy()
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Dsip.c105 unsigned phy, bmsr, anlpar; member
181 DPRINTF(("PHY %d (%04x.%04x)\n", l->phy, in sip_init()
182 mii_read(l, l->phy, 2), mii_read(l, l->phy, 3))); in sip_init()
356 mii_read(struct local *l, int phy, int reg) in mii_read() argument
367 mii_write(struct local *l, int phy, int reg, int val) in mii_write() argument
376 int phy, ctl, sts, bound; in mii_initphy() local
378 for (phy = 0; phy < 32; phy++) { in mii_initphy()
379 ctl = mii_read(l, phy, MII_BMCR); in mii_initphy()
380 sts = mii_read(l, phy, MII_BMSR); in mii_initphy()
387 ctl = mii_read(l, phy, MII_BMCR); in mii_initphy()
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Dtlp.c107 unsigned phy, bmsr, anlpar; member
285 mii_read(struct local *l, int phy, int reg) in mii_read() argument
289 data = (R110 << 10) | (phy << 5) | reg; in mii_read()
324 mii_write(struct local *l, int phy, int reg, int val) in mii_write() argument
328 data = (W101 << 28) | (phy << 23) | (reg << 18) | (02 << 16); in mii_write()
374 int phy, ctl, sts, bound; in mii_initphy() local
376 for (phy = 0; phy < 32; phy++) { in mii_initphy()
377 ctl = mii_read(l, phy, MII_BMCR); in mii_initphy()
378 sts = mii_read(l, phy, MII_BMSR); in mii_initphy()
385 ctl = mii_read(l, phy, MII_BMCR); in mii_initphy()
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Dstg.c130 unsigned csr, rx, tx, phy; member
213 DPRINTF(("PHY %d (%04x.%04x)\n", l->phy, in stg_init()
214 mii_read(l, l->phy, 2), mii_read(l, l->phy, 3))); in stg_init()
384 mii_read(struct local *l, int phy, int reg) in mii_read() argument
391 data = (R0110 << 10) | (phy << 5) | reg; in mii_read()
412 mii_write(struct local *l, int phy, int reg, int val) in mii_write() argument
416 data = (W0101 << 28) | (phy << 23) | (reg << 18) | (A10 << 16); in mii_write()
443 int phy, ctl, sts, bound; in mii_initphy() local
448 for (phy = 0; phy < 32; phy++) { in mii_initphy()
449 ctl = mii_read(l, phy, MII_BMCR); in mii_initphy()
[all …]
Drge.c123 unsigned phy, bmsr, anlpar; member
189 DPRINTF(("PHY %d (%04x.%04x)\n", l->phy, in rge_init()
190 mii_read(l, l->phy, 2), mii_read(l, l->phy, 3))); in rge_init()
314 mii_read(struct local *l, int phy, int reg) in mii_read() argument
329 mii_write(struct local *l, int phy, int reg, int data) in mii_write() argument
369 int bound, ctl, phy, sts; in mii_initphy() local
371 phy = 7; /* internal rgephy, always at 7 */ in mii_initphy()
372 ctl = mii_read(l, phy, MII_BMCR); in mii_initphy()
373 mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET); in mii_initphy()
377 ctl = mii_read(l, phy, MII_BMCR); in mii_initphy()
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Dsme.c98 unsigned phy, bmsr, anlpar; member
129 l->phy = 1; /* 9420 internal PHY */ in sme_init()
143 DPRINTF(("PHY %d (%04x.%04x)\n", l->phy, in sme_init()
144 mii_read(l, l->phy, 2), mii_read(l, l->phy, 3))); in sme_init()
149 val = mii_read(l, l->phy, 31); in sme_init()
276 mii_read(struct local *l, int phy, int reg) in mii_read() argument
283 ctl = (phy << 11) | (reg << 6) | (0 << 1); /* READ op */ in mii_read()
292 mii_write(struct local *l, int phy, int reg, int val) in mii_write() argument
299 ctl = (phy << 11) | (reg << 6) | (1 << 1); /* WRITE op */ in mii_write()
309 mii_write(l, l->phy, MII_ANAR, anar); in mii_dealan()
[all …]
Dnvt.c146 unsigned phy, bmsr, anlpar; member
188 l->phy = CSR_READ_1(l, VR_MIICFG) & 0x1f; in nvt_init()
200 DPRINTF(("PHY %d (%04x.%04x)\n", l->phy, in nvt_init()
201 mii_read(l, l->phy, 2), mii_read(l, l->phy, 3))); in nvt_init()
206 val = mii_read(l, l->phy, 20); in nvt_init()
344 mii_read(struct local *l, int phy, int reg) in mii_read() argument
349 CSR_WRITE_1(l, VR_MIICFG, phy); in mii_read()
361 mii_write(struct local *l, int phy, int reg, int data) in mii_write() argument
367 CSR_WRITE_1(l, VR_MIICFG, phy); in mii_write()
399 mii_write(l, l->phy, MII_ANAR, anar); in mii_dealan()
[all …]
/netbsd/src/sys/dev/mii/
Dukphy_subr.c57 ukphy_status(struct mii_softc *phy) in ukphy_status() argument
59 struct mii_data *mii = phy->mii_pdata; in ukphy_status()
68 PHY_READ(phy, MII_BMSR, &bmsr); in ukphy_status()
69 PHY_READ(phy, MII_BMSR, &bmsr); in ukphy_status()
73 PHY_READ(phy, MII_BMCR, &bmcr); in ukphy_status()
95 PHY_READ(phy, MII_ANAR, &anar); in ukphy_status()
96 PHY_READ(phy, MII_ANLPAR, &anlpar); in ukphy_status()
98 if ((phy->mii_flags & MIIF_HAVE_GTCR) != 0 && in ukphy_status()
99 (phy->mii_extcapabilities & in ukphy_status()
101 PHY_READ(phy, MII_100T2CR, &gtcr); in ukphy_status()
[all …]
/netbsd/src/external/gpl3/gdb/dist/sim/bfin/
Ddv-eth_phy.c81 struct eth_phy *phy = hw_data (me); in eth_phy_io_write_buffer() local
88 reg_off = addr - phy->base; in eth_phy_io_write_buffer()
89 valuep = (void *)((uintptr_t)phy + reg_base() + reg_off); in eth_phy_io_write_buffer()
115 struct eth_phy *phy = hw_data (me); in eth_phy_io_read_buffer() local
119 reg_off = addr - phy->base; in eth_phy_io_read_buffer()
120 valuep = (void *)((uintptr_t)phy + reg_base() + reg_off); in eth_phy_io_read_buffer()
149 attach_eth_phy_regs (struct hw *me, struct eth_phy *phy) in attach_eth_phy_regs() argument
173 phy->base = attach_address; in attach_eth_phy_regs()
179 struct eth_phy *phy; in eth_phy_finish() local
181 phy = HW_ZALLOC (me, struct eth_phy); in eth_phy_finish()
[all …]
/netbsd/src/sys/arch/evbarm/conf/
DRPI135 exphy* at mii? phy ? # 3Com internal PHYs
136 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
137 glxtphy* at mii? phy ? # Level One LXT-1000 PHYs
138 gphyter* at mii? phy ? # NS83861 Gig-E PHY
139 icsphy* at mii? phy ? # Integrated Circuit Systems ICS189x
140 igphy* at mii? phy ? # Intel IGP01E1000
141 ihphy* at mii? phy ? # Intel 82577 PHYs
142 ikphy* at mii? phy ? # Intel 82563 PHYs
143 inphy* at mii? phy ? # Intel 82555 PHYs
144 iophy* at mii? phy ? # Intel 82553 PHYs
[all …]
DARMADAXP270 acphy* at mii? phy ? # Altima AC101 10/100 PHY
271 amhphy* at mii? phy ? # AMD 79c901 PHY (10BASE-T part)
272 bmtphy* at mii? phy ? # Broadcom BCM5201/5202 PHYs
273 brgphy* at mii? phy ? # Broadcom BCM5400/5401 Gig-E PHYs
274 ciphy* at mii? phy ? # Cicada CS8201 Gig-E PHYs
275 dmphy* at mii? phy ? # Davicom DM9101 PHYs
276 exphy* at mii? phy ? # 3Com internal PHYs
277 gentbi* at mii? phy ? # Generic ten-bit 1000BASE-X PHYs
278 glxtphy* at mii? phy ? # Level One LXT-1000 Gig-E PHYs
279 gphyter* at mii? phy ? # NatSemi DP83861 Gig-E PHYs
[all …]
DIXDP425156 npe0 at ixpnpe0 phy 0
157 npe1 at ixpnpe1 phy 1
193 acphy* at mii? phy ? # Altima AC101 and AMD Am79c874 PHYs
194 amhphy* at mii? phy ? # AMD 79c901 Ethernet PHYs
195 bmtphy* at mii? phy ? # Broadcom BCM5201 and BCM5202 PHYs
196 brgphy* at mii? phy ? # Broadcom BCM5400-family PHYs
197 dmphy* at mii? phy ? # Davicom DM9101 PHYs
198 exphy* at mii? phy ? # 3Com internal PHYs
199 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
200 glxtphy* at mii? phy ? # Level One LXT-1000 PHYs
[all …]
DZAO425180 acphy* at mii? phy ? # Altima AC101 and AMD Am79c874 PHYs
181 amhphy* at mii? phy ? # AMD 79c901 Ethernet PHYs
182 bmtphy* at mii? phy ? # Broadcom BCM5201 and BCM5202 PHYs
183 brgphy* at mii? phy ? # Broadcom BCM5400-family PHYs
184 dmphy* at mii? phy ? # Davicom DM9101 PHYs
185 exphy* at mii? phy ? # 3Com internal PHYs
186 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
187 glxtphy* at mii? phy ? # Level One LXT-1000 PHYs
188 gphyter* at mii? phy ? # NS83861 Gig-E PHY
189 icsphy* at mii? phy ? # Integrated Circuit Systems ICS189x
[all …]
/netbsd/src/sys/arch/cobalt/stand/boot/
Dtlp.c147 u_int phy; member
434 tlp_mii_read(struct local *l, int phy, int reg)
441 tlp_mii_write(struct local *l, int phy, int reg, int val)
456 int phy, bound;
459 for (phy = 0; phy < 32; phy++) {
460 ctl = tlp_mii_read(l, phy, MII_BMCR);
461 sts = tlp_mii_read(l, phy, MII_BMSR);
468 ctl = tlp_mii_read(l, phy, MII_BMCR);
469 tlp_mii_write(l, phy, MII_BMCR, ctl | BMCR_RESET);
473 ctl = tlp_mii_read(l, phy, MII_BMCR);
[all …]
/netbsd/src/sys/arch/evbppc/conf/
DOPENBLOCKS266_OPT100 acphy* at mii? phy ? # Altima AC101 and AMD Am79c874 PHYs
101 amhphy* at mii? phy ? # AMD 79c901 Ethernet PHYs
102 bmtphy* at mii? phy ? # Broadcom BCM5201 and BCM5202 PHYs
103 brgphy* at mii? phy ? # Broadcom BCM5400-family PHYs
104 ciphy* at mii? phy ? # Cicada CS8201 Gig-E PHYs
105 dmphy* at mii? phy ? # Davicom DM9101 PHYs
106 exphy* at mii? phy ? # 3Com internal PHYs
107 gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
108 glxtphy* at mii? phy ? # Level One LXT-1000 PHYs
109 gphyter* at mii? phy ? # NS83861 Gig-E PHY
[all …]
/netbsd/src/sys/arch/hpcarm/conf/
DJORNADA820160 #acphy* at mii? phy ? # DAltima AC101 and AMD Am79c874 PHYs
161 #amhphy* at mii? phy ? # AMD 79c901 Ethernet PHYs
162 #bmtphy* at mii? phy ? # Broadcom BCM5201 and BCM5202 PHYs
163 #brgphy* at mii? phy ? # Broadcom BCM5400-family PHYs
164 #dmphy* at mii? phy ? # Davicom DM9101 PHYs
165 #exphy* at mii? phy ? # 3Com internal PHYs
166 #glxtphy* at mii? phy ? # Level One LXT-1000 PHYs
167 #gphyter* at mii? phy ? # NS83861 Gig-E PHY
168 #icsphy* at mii? phy ? # Integrated Circuit Systems ICS189x
169 #inphy* at mii? phy ? # Intel 82555 PHYs
[all …]
/netbsd/src/sys/arch/ibmnws/conf/
DGENERIC249 #acphy* at mii? phy ? # DAltima AC101 and AMD Am79c874 PHYs
250 #amhphy* at mii? phy ? # AMD 79c901 Ethernet PHYs
251 #bmtphy* at mii? phy ? # Broadcom BCM5201 and BCM5202 PHYs
252 #brgphy* at mii? phy ? # Broadcom BCM5400-family PHYs
253 #dmphy* at mii? phy ? # Davicom DM9101 PHYs
254 #exphy* at mii? phy ? # 3Com internal PHYs
255 #gentbi* at mii? phy ? # Generic Ten-Bit 1000BASE-[CLS]X PHYs
256 #glxtphy* at mii? phy ? # Level One LXT-1000 PHYs
257 #gphyter* at mii? phy ? # NS83861 Gig-E PHY
258 icsphy* at mii? phy ? # Integrated Circuit Systems ICS189x
[all …]

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