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Searched refs:outb (Results 1 – 25 of 99) sorted by relevance

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/netbsd/src/sys/arch/bebox/stand/boot/
Dvreset.c450 outb(0x3CE, 0x06); in vga_reset()
484 outb(0x3c2, 0x63); /* MISC */ in vga_reset()
485 outb(0x3c2, 0x67); /* MISC */ in vga_reset()
498 outb(0x3c2, 0x63); /* MISC */ in vga_reset()
515 outb(0x3c2, 0x63); /* MISC */ in vga_reset()
553 outb(0x3c0, (index & 0x1F) | 0x20); in writeAttr()
555 outb(0x3c0, (index & 0x1F)); in writeAttr()
556 outb(0x3c0, data); in writeAttr()
568 outb(svp->io_port, svp->io_index); in setTextRegs()
569 outb(svp->io_port+1, svp->io_value); in setTextRegs()
[all …]
Dfd.c364 outb(FDC_RATE(ctlr), un->un_type->rate); /* rate set */ in fd_check()
409 outb(FDC_DATA(ctlr), cmd); in fdc_out()
459 outb(FDC_DOR(ctlr), DOR_RESET | DOR_DMAEN | unit in motor_on()
468 outb(FDC_DOR(ctlr), DOR_RESET); /* reset & motor off */ in motor_off()
477 outb(FDC_DOR(ctlr), 0); /* fdc reset */ in fdReset()
479 outb(FDC_DOR(ctlr), DOR_RESET); in fdReset()
656 outb(INT_CTL0, ICW1_AT); /* ICW1 */ in irq_init()
657 outb(INT_CTL1, 0); /* ICW2 for master */ in irq_init()
658 outb(INT_CTL1, (1 << CASCADE_IRQ)); /* ICW3 tells slaves */ in irq_init()
659 outb(INT_CTL1, ICW4_AT); /* ICW4 */ in irq_init()
[all …]
Dvga.c103 outb(addr_6845, 14); in cursor()
104 outb(addr_6845+1, pos >> 8); in cursor()
105 outb(addr_6845, 15); in cursor()
106 outb(addr_6845+1, pos); in cursor()
267 outb(addr_6845, 10); in vga_putc()
268 outb(addr_6845+1, d->cx); in vga_putc()
269 outb(addr_6845, 11); in vga_putc()
270 outb(addr_6845+1, 13); in vga_putc()
408 outb(0x3C4, 0x01); in video_on()
409 outb(0x3C5, inb(0x3C5) & ~0x20); in video_on()
[all …]
Dkbd.c179 outb(KBSTATP, 0xAA); in kbdreset()
188 outb(KBSTATP, 0x60); in kbdreset()
191 outb(KBDATAP, 0x45); in kbdreset()
196 outb(KBSTATP, 0xAE); in kbdreset()
/netbsd/src/sys/arch/prep/stand/boot/
Dvreset.c167 outb(VGA_GR_PORT, 0x06); in vga_reset()
188 outb(VGA_GR_PORT, 0x0b); /* disable linear addressing */ in vga_reset()
189 outb(VGA_GR_DATA, inb(VGA_GR_DATA) & ~0x30); in vga_reset()
191 outb(VGA_GR_PORT, 0x0e); /* disable 256 color mode */ in vga_reset()
192 outb(VGA_GR_DATA, inb(VGA_GR_DATA) & ~0x01); in vga_reset()
193 outb(0xd00, 0xff); /* enable auto-centering */ in vga_reset()
195 outb(VGA_CR_PORT, 0x33); in vga_reset()
196 outb(VGA_CR_DATA, inb(VGA_CR_DATA) & ~0x90); in vga_reset()
197 outb(VGA_CR_PORT, 0x32); in vga_reset()
198 outb(VGA_CR_DATA, inb(VGA_CR_DATA) | 0x04); in vga_reset()
[all …]
Dvga.c105 outb(addr_6845, 14); in cursor()
106 outb(addr_6845+1, pos >> 8); in cursor()
107 outb(addr_6845, 15); in cursor()
108 outb(addr_6845+1, pos); in cursor()
269 outb(addr_6845, 10); in vga_putc()
270 outb(addr_6845+1, d->cx); in vga_putc()
271 outb(addr_6845, 11); in vga_putc()
272 outb(addr_6845+1, 13); in vga_putc()
410 outb(0x3C4, 0x01); in video_on()
411 outb(0x3C5, inb(0x3C5) & ~0x20); in video_on()
[all …]
Dkbd.c179 outb(KBSTATP, 0xAA); in kbdreset()
188 outb(KBSTATP, 0x60); in kbdreset()
191 outb(KBDATAP, 0x45); in kbdreset()
196 outb(KBSTATP, 0xAE); in kbdreset()
Dio.c49 outb(int port, char val) in outb() function
58 outb(port, val>>8); in outw()
59 outb(port+1, val); in outw()
/netbsd/src/sys/arch/x86/x86/
Di8259.c133 outb(IO_ICU1 + PIC_ICW1, ICW1_SELECT | ICW1_LTIM | ICW1_IC4); in i8259_default_setup()
137 outb(IO_ICU1 + PIC_ICW1, ICW1_SELECT | ICW1_IC4); in i8259_default_setup()
140 outb(IO_ICU1 + PIC_ICW2, ICU_OFFSET); in i8259_default_setup()
142 outb(IO_ICU1 + PIC_ICW3, ICW3_CASCADE(IRQ_SLAVE)); in i8259_default_setup()
146 outb(IO_ICU1 + PIC_ICW4, ICW4_AEOI | ICW4_8086); in i8259_default_setup()
149 outb(IO_ICU1 + PIC_ICW4, ICW4_8086); in i8259_default_setup()
152 outb(IO_ICU1 + PIC_OCW1, 0xff); in i8259_default_setup()
154 outb(IO_ICU1 + PIC_OCW3, OCW3_SELECT | OCW3_SSMM | OCW3_SMM); in i8259_default_setup()
156 outb(IO_ICU1 + PIC_OCW3, OCW3_SELECT | OCW3_RR); in i8259_default_setup()
159 outb(IO_ICU1 + PIC_OCW2, OCW2_SELECT | OCW2_R | OCW2_SL | in i8259_default_setup()
[all …]
/netbsd/src/sys/arch/shark/isa/
Disa_shark_machdep.c124 outb(IO_ICU1, 0x19); /* reset; four bytes, level triggered */ in isa_init8259s()
125 outb(IO_ICU1+1, ICU_OFFSET); /* int base: not used */ in isa_init8259s()
126 outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */ in isa_init8259s()
127 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ in isa_init8259s()
128 outb(IO_ICU1+1, 0xff); /* disable all interrupts */ in isa_init8259s()
129 outb(IO_ICU1, 0x68); /* special mask mode (if available) */ in isa_init8259s()
130 outb(IO_ICU1, 0x0a); /* Read IRR, not ISR */ in isa_init8259s()
132 outb(IO_ICU2, 0x19); /* reset; four bytes, level triggered */ in isa_init8259s()
133 outb(IO_ICU2+1, ICU_OFFSET+8); /* int base + offset for master: not used */ in isa_init8259s()
134 outb(IO_ICU2+1, IRQ_SLAVE); /* who ami i? */ in isa_init8259s()
[all …]
Dclock.c200 outb(IO_RTC, reg); in mc146818_read()
208 outb(IO_RTC, reg); in mc146818_write()
209 outb(IO_RTC+1, datum); in mc146818_write()
284 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT); in startrtclock()
285 outb(IO_TIMER1 + TIMER_CNTR0, TIMER0_ROLLOVER % 256); in startrtclock()
286 outb(IO_TIMER1 + TIMER_CNTR0, TIMER0_ROLLOVER / 256); in startrtclock()
392 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in gettick()
485 outb(IO_TIMER1 + TIMER_MODE, in findcpuspeed()
487 outb(IO_TIMER1 + TIMER_CNTR0, 0xff); in findcpuspeed()
488 outb(IO_TIMER1 + TIMER_CNTR0, 0xff); in findcpuspeed()
/netbsd/src/sys/arch/arm/footbridge/isa/
Disa_machdep.c125 outb(IO_ICU1, 0x11); /* reset; program device, four bytes */ in isa_icu_init()
126 outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */ in isa_icu_init()
127 outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */ in isa_icu_init()
129 outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */ in isa_icu_init()
131 outb(IO_ICU1+1, 1); /* 8086 mode */ in isa_icu_init()
133 outb(IO_ICU1+1, 0xff); /* leave interrupts masked */ in isa_icu_init()
134 outb(IO_ICU1, 0x68); /* special mask mode (if available) */ in isa_icu_init()
135 outb(IO_ICU1, 0x0a); /* Read IRR by default. */ in isa_icu_init()
137 outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */ in isa_icu_init()
140 outb(IO_ICU2, 0x11); /* reset; program device, four bytes */ in isa_icu_init()
[all …]
/netbsd/src/sys/arch/x86/include/
Di8259.h50 #define SET_ICUS() (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))
92 outb %al,$IO_ICU1
96 outb %al,$ICUADDR
103 outb %al,$IO_ICU1
111 outb %al,$IO_ICU2 /* do the second ICU first */ ;\
113 outb %al,$IO_ICU1
131 outb %al,$(ICUADDR+1)
137 outb %al,$(ICUADDR+1)
/netbsd/src/external/gpl3/gdb/dist/gdb/
Dser-go32.c236 #define outb(p,a,v) outportb((p)->base + (a), (v)) macro
486 outb (port, com_cfcr, 0); in dos_open()
487 outb (port, com_iir, 0); in dos_open()
499 outb (port, com_ier, 0); in dos_open()
502 outb (port, com_fifo, in dos_open()
512 outb (port, com_mcr, MCR_IENABLE); in dos_open()
518 outb (port, com_mcr, 0); in dos_open()
519 outb (port, com_fifo, 0); in dos_open()
537 outb (port, com_cfcr, CFCR_DLAB); in dos_open()
538 outb (port, com_dlbl, i & 0xff); in dos_open()
[all …]
/netbsd/src/sys/arch/i386/stand/lib/
Dcomio_direct.c164 outb(combase + com_data, c); in computc_d()
188 outb(combase + com_cfcr, LCR_DLAB); in cominit_d()
203 outb(combase + com_dlbl, rate); in cominit_d()
204 outb(combase + com_dlbh, rate >> 8); in cominit_d()
205 outb(combase + com_cfcr, LCR_8BITS); in cominit_d()
206 outb(combase + com_mcr, MCR_DTR | MCR_RTS); in cominit_d()
207 outb(combase + com_fifo, in cominit_d()
209 outb(combase + com_ier, 0); in cominit_d()
Dgatea20.c61 outb(0x92, data | 0x2); in gateA20()
68 outb(K_CMD, KC_CMD_WOUT); in gateA20()
72 outb(K_RDWR, x_20); in gateA20()
/netbsd/src/sys/arch/i386/mca/
Dmca_machdep.c166 outb(MCA_MB_SETUP_REG, 0xff); /* ensure m/board setup is disabled */ in mca_conf_read()
167 outb(MCA_ADAP_SETUP_REG, slot | MCA_ADAP_SET); in mca_conf_read()
169 outb(MCA_ADAP_SETUP_REG, 0); in mca_conf_read()
182 outb(MCA_MB_SETUP_REG, 0xff); /* ensure m/board setup is disabled */ in mca_conf_write()
183 outb(MCA_ADAP_SETUP_REG, slot | MCA_ADAP_SET); in mca_conf_write()
184 outb(MCA_POS_REG(reg), data); in mca_conf_write()
185 outb(MCA_ADAP_SETUP_REG, 0); in mca_conf_write()
239 outb(MCA_MB_SETUP_REG, 0xff); in mca_nmi()
243 outb(MCA_ADAP_SETUP_REG, slot | MCA_ADAP_SET); in mca_nmi()
255 outb(MCA_ADAP_SETUP_REG, 0); in mca_nmi()
[all …]
/netbsd/src/sys/arch/arc/isa/
Disadma.c186 outb(dmapageport[0][chan], di->phys[0].addr>>16); in isadma_start()
187 outb(waport, di->phys[0].addr); in isadma_start()
188 outb(waport, di->phys[0].addr>>8); in isadma_start()
191 outb(waport + 1, --nbytes); in isadma_start()
192 outb(waport + 1, nbytes>>8); in isadma_start()
209 outb(dmapageport[1][chan], di->phys[0].addr >> 16); in isadma_start()
210 outb(waport, di->phys[0].addr >> 1); in isadma_start()
211 outb(waport, di->phys[0].addr >> 9); in isadma_start()
215 outb(waport + 2, --nbytes); in isadma_start()
216 outb(waport + 2, nbytes>>8); in isadma_start()
/netbsd/src/sys/arch/shark/shark/
Dhat.c101 outb(ATSR_REG1_REG, in hatClkOff()
151 outb(ATSR_REG1_REG, in hatClkOn()
227 outb(TIMER_MODE, TIMER_SEL2|TIMER_RATEGEN|TIMER_16BIT); in hatClkCount()
228 outb(TIMER_CNTR2, count % 256); in hatClkCount()
229 outb(TIMER_CNTR2, count / 256); in hatClkCount()
/netbsd/src/sys/arch/rs6000/mca/
Dmca_machdep.c152 outb(RS6000_BUS_SPACE_IO + MCA_POS_REG(reg) + (slot<<16), data); in mca_conf_write()
200 outb(MCA_MB_SETUP_REG, 0xff); in mca_nmi()
204 outb(MCA_ADAP_SETUP_REG, slot | MCA_ADAP_SET); in mca_nmi()
216 outb(MCA_ADAP_SETUP_REG, 0); in mca_nmi()
248 outb(PORT_DISKLED, inb(PORT_DISKLED) | DISKLED_ON); in mca_disk_busy()
257 outb(PORT_DISKLED, inb(PORT_DISKLED) & ~DISKLED_ON); in mca_disk_unbusy()
/netbsd/src/external/bsd/atf/dist/atf-c/detail/
Dtest_helpers.c128 atf_process_stream_t outb, errb; in run_h_tc() local
137 RE(atf_process_stream_init_redirect_path(&outb, &outpath)); in run_h_tc()
139 RE(atf_process_fork(&child, run_h_tc_child, &outb, &errb, &data)); in run_h_tc()
141 atf_process_stream_fini(&outb); in run_h_tc()
/netbsd/src/sys/arch/rs6000/stand/boot/
Dio.c32 outb(int port, char val) in outb() function
41 outb(port, val>>8); in outw()
42 outb(port+1, val); in outw()
/netbsd/src/sys/arch/x86/isa/
Dclock.c315 outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0|TIMER_RATEGEN|TIMER_16BIT); in initrtclock()
318 outb(IO_TIMER1+TIMER_CNTR0, tval % 256); in initrtclock()
319 outb(IO_TIMER1+TIMER_CNTR0, tval / 256); in initrtclock()
391 outb(0x61, inb(0x61) | 0x80); in i8254_clockintr()
409 outb(IO_TIMER1 + TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in i8254_get_timecount()
441 outb(IO_TIMER1+TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); in gettick()
/netbsd/src/sys/arch/i386/acpi/
Dacpi_wakecode.S95 outb %al,$0x42
97 outb %al,$0x42
100 outb %al,$0x61
132 outb %al,$0x61
/netbsd/src/sys/arch/amd64/acpi/
Dacpi_wakecode.S98 outb %al,$0x42
100 outb %al,$0x42
103 outb %al,$0x61
136 outb %al,$0x61

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