Searched refs:nd_bsw4 (Results 1 – 2 of 2) sorted by relevance
| /netbsd/src/sys/arch/next68k/dev/ |
| D | nextdma.c | 162 #define nd_bsw4(reg,val) \ macro
285 nd_bsw4(DD_CSR, DMACSR_RESET | DMACSR_CLRCOMPLETE); in nextdma_init()
286 nd_bsw4(DD_CSR, 0); in nextdma_init()
331 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | DMACSR_RESET); in nextdma_reset()
439 nd_bsw4(DD_NEXT_INITBUF, dd_next); in nextdma_setup_curr_regs()
441 nd_bsw4(DD_NEXT, dd_next); in nextdma_setup_curr_regs()
443 nd_bsw4(DD_LIMIT, dd_limit); in nextdma_setup_curr_regs()
445 nd_bsw4(DD_SAVED_NEXT, dd_saved_next); in nextdma_setup_curr_regs()
447 nd_bsw4(DD_SAVED_LIMIT, dd_saved_limit); in nextdma_setup_curr_regs()
499 nd_bsw4(DD_START, dd_start); in nextdma_setup_cont_regs()
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| D | esp.c | 186 #define nd_bsw4(reg, val) \ macro
1520 nd_bsw4(DD_START, stat->nd_map_cont->dm_segs[ in esp_dma_int()
1522 nd_bsw4(DD_STOP, (stat->nd_map_cont->dm_segs[ in esp_dma_int()
1528 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | in esp_dma_int()
1555 nd_bsw4(DD_CSR, DMACSR_CLRCOMPLETE | in esp_dma_int()
1560 nd_bsw4(DD_NEXT, in esp_dma_int()
1562 nd_bsw4(DD_LIMIT, in esp_dma_int()
1567 nd_bsw4(DD_START, in esp_dma_int()
1570 nd_bsw4(DD_STOP, in esp_dma_int()
1577 nd_bsw4(DD_CSR, DMACSR_SETENABLE | DMACSR_CLRCOMPLETE | in esp_dma_int()
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