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Searched refs:match_operand (Results 1 – 25 of 201) sorted by relevance

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/netbsd/src/external/gpl3/gcc/dist/gcc/config/arm/
Dmve.md21 [(set (match_operand:MVE_types 0 "nonimmediate_operand" "=w,w,r,w,w,r,w,Ux,w")
22 (match_operand:MVE_types 1 "general_operand" "w,r,w,Dn,UxUi,r,Dm,w,Ul"))]
83 [(set (match_operand:MVE_vecs 0 "s_register_operand" "=w")
85 (match_operand:<V_elem> 1 "s_register_operand" "r")))]
95 [(set (match_operand:XI 0 "mve_struct_operand" "=Ug")
96 (unspec:XI [(match_operand:XI 1 "s_register_operand" "w")
130 (set (match_operand:MVE_0 0 "s_register_operand" "=w")
131 (unspec:MVE_0 [(match_operand:MVE_0 1 "s_register_operand" "0")
132 (match_operand:MVE_0 2 "s_register_operand" "w")
133 (match_operand:<MVE_VPRED> 3 "vpr_register_operand" "Up")]
[all …]
Dldmstm.md26 [(set (match_operand:SI 1 "arm_hard_general_register_operand" "")
27 (mem:SI (match_operand:SI 5 "s_register_operand" "rk")))
28 (set (match_operand:SI 2 "arm_hard_general_register_operand" "")
31 (set (match_operand:SI 3 "arm_hard_general_register_operand" "")
34 (set (match_operand:SI 4 "arm_hard_general_register_operand" "")
44 [(set (match_operand:SI 1 "low_register_operand" "")
45 (mem:SI (match_operand:SI 5 "s_register_operand" "l")))
46 (set (match_operand:SI 2 "low_register_operand" "")
49 (set (match_operand:SI 3 "low_register_operand" "")
52 (set (match_operand:SI 4 "low_register_operand" "")
[all …]
Diwmmxt.md31 [(set (match_operand:V8QI 0 "register_operand" "=y")
32 (vec_duplicate:V8QI (match_operand:QI 1 "s_register_operand" "r")))]
40 [(set (match_operand:V4HI 0 "register_operand" "=y")
41 (vec_duplicate:V4HI (match_operand:HI 1 "s_register_operand" "r")))]
49 [(set (match_operand:V2SI 0 "register_operand" "=y")
50 (vec_duplicate:V2SI (match_operand:SI 1 "s_register_operand" "r")))]
58 [(set (match_operand:DI 0 "register_operand" "=y")
59 (ior:DI (match_operand:DI 1 "register_operand" "%y")
60 (match_operand:DI 2 "register_operand" "y")))]
69 [(set (match_operand:DI 0 "register_operand" "=y")
[all …]
Dneon.md27 [(set (match_operand:V8QI 0 "memory_operand" "=Un")
28 (unspec:V8QI [(match_operand:V8QI 1 "s_register_operand" "w")]
37 [(set (match_operand:VDXMOV 0 "nonimmediate_operand"
39 (match_operand:VDXMOV 1 "general_operand"
84 [(set (match_operand:VQXMOV 0 "nonimmediate_operand"
86 (match_operand:VQXMOV 1 "general_operand"
136 [(set (match_operand:TI 0 "nonimmediate_operand")
137 (match_operand:TI 1 "general_operand"))]
150 [(set (match_operand:VSTRUCT 0 "nonimmediate_operand")
151 (match_operand:VSTRUCT 1 "general_operand"))]
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/ia64/
Dvect.md33 [(set (match_operand:VECINT 0 "general_operand" "")
34 (match_operand:VECINT 1 "general_operand" ""))]
44 [(set (match_operand:VECINT 0 "destination_operand"
46 (match_operand:VECINT 1 "move_operand"
63 [(set (match_operand:VECINT 0 "gr_register_operand" "=r")
64 (not:VECINT (match_operand:VECINT 1 "gr_register_operand" "r")))]
70 [(set (match_operand:VECINT 0 "grfr_register_operand" "=r,*f")
72 (match_operand:VECINT 1 "grfr_register_operand" "r,*f")
73 (match_operand:VECINT 2 "grfr_reg_or_8bit_operand" "r,*f")))]
81 [(set (match_operand:VECINT 0 "grfr_register_operand" "=r,*f")
[all …]
Dia64.md234 [(set (match_operand:CCI 0 "destination_operand" "=c,c,?c,?*r, c,*r,*m,*r")
235 (match_operand:CCI 1 "move_operand" " O,n, c, c,*r,*m,*r,*r"))]
250 [(set (match_operand:CCI 0 "register_operand" "")
251 (match_operand:CCI 1 "register_operand" ""))]
262 [(set (match_operand:BI 0 "destination_operand" "=c,c,?c,?*r, c,*r,*r,*m,*r")
263 (match_operand:BI 1 "move_operand" " O,n, c, c,*r, n,*m,*r,*r"))]
280 [(set (match_operand:BI 0 "register_operand" "")
281 (match_operand:BI 1 "register_operand" ""))]
292 [(set (match_operand:BI 0 "register_operand" "")
293 (match_operand:BI 1 "register_operand" ""))]
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/s390/
Dvx-builtins.md77 [(set (match_operand:V_HW_32_64 0 "register_operand" "=v")
78 (unspec:V_HW_32_64 [(match_operand:V_HW_32_64 1 "register_operand" "0")
79 (match_operand:<TOINTVEC> 2 "register_operand" "v")
80 (match_operand:BLK 3 "memory_operand" "R")
81 (match_operand:QI 4 "const_mask_operand" "C")]
88 [(match_operand:VI_HW 0 "register_operand" "=v")
89 (match_operand:QI 1 "const_int_operand" "C")
90 (match_operand:QI 2 "const_int_operand" "C")]
125 [(match_operand:V16QI 0 "register_operand" "")
126 (match_operand:HI 1 "const_int_operand" "")]
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/mips/
Dloongson-mmi.md102 [(set (match_operand:VWHB 0)
103 (match_operand:VWHB 1))]
112 [(set (match_operand:VWHB 0 "nonimmediate_operand" "=m,f,d,f, d, m, d")
113 (match_operand:VWHB 1 "move_operand" "f,m,f,dYG,dYG,dYG,m"))]
122 [(set (match_operand:VWHB 0 "register_operand")
123 (match_operand 1 ""))]
133 [(set (match_operand:VHB 0 "register_operand" "=f")
135 (match_operand:DI 1 "reg_or_0_operand" "Jd"))]
144 [(set (match_operand:V2SI 0 "register_operand" "=f")
146 (match_operand:SI 1 "register_operand" "f")
[all …]
Dmips-msa.md239 [(match_operand:MSA 0 "register_operand")
240 (match_operand:MSA 1 "")]
249 [(set (match_operand:<VHMODE> 0 "register_operand" "=f")
252 (match_operand:IMSA_DWH 1 "register_operand" "f"))
254 (match_operand:IMSA_DWH 2 "register_operand" "f"))))]
261 [(set (match_operand:V2DF 0 "register_operand" "=f")
264 (match_operand:V4SF 1 "register_operand" "f")
272 [(set (match_operand:V2DF 0 "register_operand" "=f")
275 (match_operand:V4SF 1 "register_operand" "f")
283 [(match_operand:<VDMODE> 0 "register_operand")
[all …]
Dmips-dspr2.md74 [(set (match_operand:V4QI 0 "register_operand" "=d")
75 (unspec:V4QI [(match_operand:V4QI 1 "reg_or_0_operand" "dYG")]
85 [(set (match_operand:V2HI 0 "register_operand" "=d")
86 (plus:V2HI (match_operand:V2HI 1 "reg_or_0_operand" "dYG")
87 (match_operand:V2HI 2 "reg_or_0_operand" "dYG")))
96 [(set (match_operand:V2HI 0 "register_operand" "=d")
97 (unspec:V2HI [(match_operand:V2HI 1 "reg_or_0_operand" "dYG")
98 (match_operand:V2HI 2 "reg_or_0_operand" "dYG")]
108 [(set (match_operand:V4QI 0 "register_operand" "=d")
109 (unspec:V4QI [(match_operand:V4QI 1 "reg_or_0_operand" "dYG")
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/h8300/
Dmova.md21 [(set (match_operand:QI 0 "register_operand" "=r,r")
22 (plus:QI (mult:QI (match_operand:QI 1 "h8300_dst_operand" "0,rQ")
24 (match_operand:QI 2 "immediate_operand" "i,i")))]
30 [(set (match_operand:QI 0 "register_operand" "=r,r")
31 (plus:QI (ashift:QI (match_operand:QI 1 "h8300_dst_operand" "0,rQ")
33 (match_operand:QI 2 "immediate_operand" "i,i")))]
39 [(set (match_operand:QI 0 "register_operand" "=r,r")
40 (plus:QI (mult:QI (match_operand:QI 1 "h8300_dst_operand" "0,rQ")
42 (match_operand:QI 2 "immediate_operand" "i,i")))]
48 [(set (match_operand:QI 0 "register_operand" "=r,r")
[all …]
Dbitfield.md19 [(set (match_operand:HI 0 "register_operand" "=&r")
20 (zero_extract:HI (xor:HI (match_operand:HI 1 "register_operand" "r")
21 (match_operand:HI 3 "const_int_operand" "n"))
23 (match_operand:HI 2 "const_int_operand" "n")))]
35 [(set (match_operand:HI 0 "register_operand" "=&r")
36 (zero_extract:HI (xor:HI (match_operand:HI 1 "register_operand" "r")
37 (match_operand:HI 3 "const_int_operand" "n"))
39 (match_operand:HI 2 "const_int_operand" "n")))
51 [(set (match_operand:SI 0 "register_operand" "=r,r")
52 (zero_extract:SI (match_operand:SI 1 "register_operand" "?0,r")
[all …]
Dcombiner.md8 [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
10 (match_operand:SI 1 "const_int_operand" "n"))
11 (match_operand:SI 2 "register_operand" "r"))]
20 [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
22 (match_operand:SI 1 "const_int_operand" "n"))
23 (match_operand:SI 2 "register_operand" "r"))
30 [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
32 (match_operand:SI 1 "const_int_operand" "n"))
33 (lshiftrt:SI (match_operand:SI 2 "register_operand" "r")
34 (match_operand:SI 3 "const_int_operand" "n")))]
[all …]
Dmultiply.md8 [(set (match_operand:HI 0 "register_operand" "")
9 (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" ""))
11 (match_operand:QI 2 "reg_or_nibble_operand" "")))]
19 [(set (match_operand:HI 0 "register_operand" "=r")
20 (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0"))
21 (match_operand:QI 2 "nibble_operand" "IP4>X")))]
30 [(set (match_operand:HI 0 "register_operand" "=r")
31 (mult:HI (sign_extend:HI (match_operand:QI 1 "register_operand" "%0"))
32 (match_operand:QI 2 "nibble_operand" "IP4>X")))
39 [(set (match_operand:HI 0 "register_operand" "=r")
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/rs6000/
Daltivec.md244 [(set (match_operand:VM2 0 "nonimmediate_operand" "=Z,v,v,?Y,?*r,?*r,v,v,?*r")
245 (match_operand:VM2 1 "input_operand" "v,Z,v,*r,Y,*r,j,W,W"))]
266 [(set (match_operand:TI 0 "nonimmediate_operand" "=Z,v,v,?Y,?r,?r,v,v")
267 (match_operand:TI 1 "input_operand" "v,Z,v,r,Y,r,j,W"))]
285 [(set (match_operand:VM 0 "altivec_register_operand")
286 (match_operand:VM 1 "easy_vector_constant_msb"))]
323 [(set (match_operand:VM 0 "altivec_register_operand")
324 (match_operand:VM 1 "easy_vector_constant_add_self"))]
352 [(set (match_operand:VM 0 "altivec_register_operand")
353 (match_operand:VM 1 "easy_vector_constant_vsldoi"))]
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/arc/
Dsimdext.md159 [(set (match_operand:V8HI 0 "general_operand" "")
160 (match_operand:V8HI 1 "general_operand" ""))]
172 [(set (match_operand:V8HI 0 "vector_register_operand" "=v")
173 …(mem:V8HI (plus:SI (zero_extend:SI (vec_select:HI (match_operand:V8HI 1 "vector_register_operand" …
174 … (parallel [(match_operand:SI 2 "immediate_operand" "L")])))
175 (match_operand:SI 3 "immediate_operand" "P"))))]
184 …[(set (mem:V8HI (plus:SI (zero_extend:SI (vec_select:HI (match_operand:V8HI 0 "vector_register_o…
185 … (parallel [(match_operand:SI 1 "immediate_operand" "L")])))
186 (match_operand:SI 2 "immediate_operand" "P")))
187 (match_operand:V8HI 3 "vector_register_operand" "=v"))]
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/vax/
Dvax.md78 [(set (match_operand 0 "")
79 (match_operand 1 ""))
89 [(set (match_operand:VAXfp 0 "")
90 (match_operand:VAXfp 1 ""))
120 (compare:VAXcc (match_operand:VAXint 0 "general_operand" "nrmT,nrmT")
121 (match_operand:VAXint 1 "general_operand" "I,nrmT")))]
132 (compare:VAXccnz (match_operand:DI 0 "general_operand" "r,nmT")
133 (match_operand:DI 1 "const_zero_operand" "I,I")))
142 (compare:VAXccnz (match_operand:VAXfp 0 "general_operand" "gF,gF")
143 (match_operand:VAXfp 1 "general_operand" "G,gF")))]
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/sparc/
Dsparc.md463 (if_then_else (match_operand 0 "v9_comparison_operator" "")
483 (if_then_else (match_operand 0 "fcc0_register_operand" "")
667 (compare:CC (match_operand:SI 0 "register_operand" "r")
668 (match_operand:SI 1 "arith_operand" "rI")))]
675 (compare:CCX (match_operand:DI 0 "register_operand" "r")
676 (match_operand:DI 1 "arith_operand" "rI")))]
683 (compare:CCC (not:SI (match_operand:SI 0 "arith_operand" "rI"))
691 (compare:CCXC (not:DI (match_operand:DI 0 "arith_operand" "rI"))
698 [(set (match_operand:CCFPE 0 "fcc_register_operand" "=c")
699 (compare:CCFPE (match_operand:SF 1 "register_operand" "f")
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/bfin/
Dbfin.md171 (and (match_operand 0 "dp_register_operand" "")
172 (match_operand 1 "mem_p_address_operand" "")))
175 (and (match_operand 0 "dp_register_operand" "")
176 (match_operand 1 "mem_spfp_address_operand" "")))
179 (and (match_operand 0 "dp_register_operand" "")
180 (match_operand 1 "mem_i_address_operand" "")))
183 (and (match_operand 1 "dp_register_operand" "")
184 (match_operand 0 "mem_p_address_operand" "")))
187 (and (match_operand 1 "dp_register_operand" "")
188 (match_operand 0 "mem_spfp_address_operand" "")))
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/m32c/
Dmuldiv.md25 [(set (match_operand:HI 0 "mra_operand" "=RhiSd,??Rmm")
26 (mult:HI (sign_extend:HI (match_operand:QI 1 "mra_operand" "%0,0"))
27 (match_operand 2 "immediate_operand" "i,i")))]
35 [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm,Raa,Raa")
36 (mult:HI (sign_extend:HI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0"))
37 … (sign_extend:HI (match_operand:QI 2 "mra_operand" "RqiSd,?Rmm,RqiSd,?Rmm,RhlSd,?Rmm"))))]
45 [(set (match_operand:HI 0 "mra_operand" "=RhiSd,RhiSd,??Rmm,??Rmm,Raa,Raa")
46 (mult:HI (sign_extend:HI (match_operand:QI 1 "mra_operand" "%0,0,0,0,0,0"))
47 (match_operand:QI 2 "mra_operand" "RqiSd,?Rmm,RqiSd,?Rmm,RhlSd,?Rmm")))]
54 [(set (match_operand:HI 0 "mra_operand" "=RhiSd,??Rmm")
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/i386/
Dsse.md1272 [(set (match_operand:VMOVE 0 "nonimmediate_operand")
1273 (match_operand:VMOVE 1 "nonimmediate_operand"))]
1281 [(set (match_operand:VMOVE 0 "nonimmediate_operand"
1283 (match_operand:VMOVE 1 "nonimmediate_or_sse_const_operand"
1336 [(set (match_operand:V48_AVX512VL 0 "register_operand")
1338 (match_operand:V48_AVX512VL 1 "nonimmediate_operand")
1339 (match_operand:V48_AVX512VL 2 "nonimm_or_0_operand")
1340 (match_operand:<avx512fmaskmode> 3 "register_or_constm1_operand")))]
1355 [(set (match_operand:V48_AVX512VL 0 "register_operand" "=v")
1358 [(match_operand:V48_AVX512VL 1 "memory_operand" "m")]
[all …]
Dmmx.md106 [(set (match_operand:MMXMODE 0 "nonimmediate_operand")
107 (match_operand:MMXMODE 1 "nonimmediate_operand"))]
115 [(set (match_operand:MMXMODE 0 "nonimmediate_operand"
117 (match_operand:MMXMODE 1 "nonimm_or_0_operand"
235 [(set (match_operand:MMXMODE 0 "nonimmediate_gr_operand")
236 (match_operand:MMXMODE 1 "nonimmediate_gr_operand"))]
242 [(set (match_operand:MMXMODE 0 "nonimmediate_gr_operand")
243 (match_operand:MMXMODE 1 "const0_operand"))]
249 [(set (match_operand:MMXMODE 0 "nonimmediate_operand")
250 (match_operand:MMXMODE 1 "nonimmediate_operand"))]
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/stormy16/
Dstormy16.md118 (match_operand:QI 0 "register_operand" "r"))]
125 [(set (match_operand:QI 0 "register_operand" "=r")
133 [(set (match_operand:QI 0 "nonimmediate_nonstack_operand" "")
134 (match_operand:QI 1 "general_operand" ""))]
141 [(set (match_operand:QI 0 "nonimmediate_nonstack_operand" "=r,m,e,e,T,r,S,W,e")
142 (match_operand:QI 1 "general_operand" "r,e,m,i,i,i,i,ie,W"))]
156 (if_then_else (match_operand:QI 0 "short_memory_operand" "")
159 (if_then_else (match_operand:QI 1 "short_memory_operand" "")
172 (match_operand:HI 0 "register_operand" "r"))]
179 [(set (match_operand:HI 0 "register_operand" "=r")
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/alpha/
Dalpha.md236 [(set (match_operand:DI 0 "register_operand")
237 (sign_extend:DI (match_operand:SI 1 "nonimmediate_operand")))])
240 [(set (match_operand:DI 0 "register_operand" "=f")
241 (unspec:DI [(match_operand:SF 1 "reg_or_0_operand" "fG")]
248 [(set (match_operand:DI 0 "register_operand" "=r,r,!*f")
250 (match_operand:SI 1 "nonimmediate_operand" "r,m,m")))]
260 [(set (match_operand:DI 0 "hard_fp_register_operand")
261 (sign_extend:DI (match_operand:SI 1 "memory_operand")))]
274 [(set (match_operand:SI 0 "hard_int_register_operand")
275 (match_operand:SI 1 "memory_operand"))
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/config/lm32/
Dlm32.md101 [(set (match_operand:QI 0 "general_operand" "")
102 (match_operand:QI 1 "general_operand" ""))]
117 [(set (match_operand:HI 0 "general_operand" "")
118 (match_operand:HI 1 "general_operand" ""))]
133 [(set (match_operand:SI 0 "general_operand" "")
134 (match_operand:SI 1 "general_operand" ""))]
220 [(parallel [(set (match_operand:BLK 0 "general_operand" "")
221 (match_operand:BLK 1 "general_operand" ""))
222 (use (match_operand:SI 2 "" ""))
223 (use (match_operand:SI 3 "const_int_operand" ""))])]
[all …]

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