| /netbsd/src/crypto/external/bsd/openssl/dist/crypto/bn/asm/ |
| D | co-586.pl | 28 local($a,$ai,$b,$bi,$c0,$c1,$c2,$pos,$i,$na,$nb)=@_; 40 &add($c0,"eax"); 50 &mov(&DWP($i*4,"eax","",0),$c0) if $pos > 0; # save r[]; 56 local($r,$a,$ai,$bi,$c0,$c1,$c2,$pos,$i,$na,$nb)=@_; 71 &add($c0,"eax"); 79 &mov(&DWP($i*4,$r,"",0),$c0) if $pos > 0; # save r[]; 85 local($r,$a,$ai,$bi,$c0,$c1,$c2,$pos,$i,$na,$nb)=@_; 105 &add($c0,"eax"); 110 &mov(&DWP($i*4,$r,"",0),$c0) if $pos > 0; # save r[]; 118 local($a,$b,$c0,$c1,$c2); [all …]
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| /netbsd/src/crypto/external/bsd/openssl/dist/crypto/bn/ |
| D | bn_asm.c | 453 # define mul_add_c(a,b,c0,c1,c2) do { \ argument 456 t += c0; /* no carry */ \ 457 c0 = (BN_ULONG)Lw(t); \ 462 # define mul_add_c2(a,b,c0,c1,c2) do { \ argument 465 BN_ULLONG tt = t+c0; /* no carry */ \ 466 c0 = (BN_ULONG)Lw(tt); \ 469 t += c0; /* no carry */ \ 470 c0 = (BN_ULONG)Lw(t); \ 475 # define sqr_add_c(a,i,c0,c1,c2) do { \ argument 478 t += c0; /* no carry */ \ [all …]
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| /netbsd/src/sys/arch/arm/arm/ |
| D | cpufunc_asm_arm67.S | 53 mcrne p15, 0, r2, c7, c0, 0 56 mcr p15, 0, r0, c2, c0, 0 59 mcrne p15, 0, r0, c5, c0, 0 62 mcrne p15, 0, r0, c7, c0, 0 74 mcr p15, 0, r0, c5, c0, 0 78 mcr p15, 0, r0, c6, c0, 0 85 mcr p15, 0, r0, c7, c0, 0 96 mcr p15, 0, r0, c7, c0, 0 /* flush cache */ 99 mcr p15, 0, r0, c2, c0, 0 102 mcr p15, 0, r0, c5, c0, 0 [all …]
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| D | armv6_start.S | 100 mrc p15, 0, R_TMP1, c1, c0, 0 102 mcr p15, 0, R_TMP1, c1, c0, 0 149 mrc p15, 0, r0, c0, c0, 0 // MIDR 152 mrc p15, 0, r0, c0, c0, 6 // REVIDR 155 mrc p15, 0, r0, c0, c0, 5 // MPIDR 158 mrc p15, 0, r0, c2, c0, 0 // TTBR0 read 161 mrc p15, 0, r0, c2, c0, 1 // TTBR1 read 164 mrc p15, 0, r0, c2, c0, 2 // TTBCR read 495 mrc p15, 0, r1, c0, c0, 0 // MIDR get 497 mrc p15, 0, r1, c0, c0, 5 // MPIDR get [all …]
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| D | cpufunc_asm.S | 65 mrc p15, 0, r0, c0, c0, 0 70 mrc p15, 0, r0, c0, c0, 1 75 mrc p15, 0, r0, c1, c0, 0 80 mrc p15, 0, r0, c5, c0, 0 85 mrc p15, 0, r0, c6, c0, 0 103 mcr p15, 0, r0, c1, c0, 0 108 mcr p15, 0, r0, c3, c0, 0 123 mrc p15, 0, r3, c1, c0, 0 /* Read the control register */ 131 mcrne p15, 0, r2, c1, c0, 0 /* Write new control register */
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| D | cpufunc_asm_armv7.S | 43 mrc p15, 0, r0, c2, c0, 0 @ arbitrary read of CP15 50 mrc p15, 0, ip, c0, c0, 5 @ get MPIDR 54 mcr p15, 0, r0, c2, c0, 0 @ set the new TTBR 0 57 mcreq p15, 0, r0, c2, c0, 1 @ set the new TTBR 1 150 mrc p15, 0, ip, c0, c0, 5 @ get MPIDR 154 mcr p15, 0, r0, c2, c0, 0 @ load new TTBR 0 157 mcreq p15, 0, r0, c2, c0, 1 @ load new TTBR 1 178 mcr p15, 2, ip, c0, c0, 0 @ set cache level to L1-I 179 mrc p15, 1, r2, c0, c0, 0 @ read CCSIDR 181 mcr p15, 2, ip, c0, c0, 0 @ set cache level to L1-D [all …]
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| /netbsd/src/external/ibm-public/postfix/dist/src/util/ |
| D | parse_utf8_char.h | 63 unsigned char c0, ch; in parse_utf8_char() local 79 if (EXPECTED((c0 = *cp) <= 0x7f) /* we know that c0 >= 0x0 */ ) { in parse_utf8_char() 83 else if (EXPECTED(c0 <= 0xdf) /* we know that c0 >= 0x80 */ ) { in parse_utf8_char() 85 if (UNEXPECTED(c0 < 0xc2) in parse_utf8_char() 93 else if (EXPECTED(c0 <= 0xef) /* we know that c0 >= 0xe0 */ ) { in parse_utf8_char() 96 || UNEXPECTED((ch = *++cp) < (c0 == 0xe0 ? 0xa0 : 0x80)) in parse_utf8_char() 98 || UNEXPECTED(ch > (c0 == 0xed ? 0x9f : 0xbf)) in parse_utf8_char() 105 else if (EXPECTED(c0 <= 0xf4) /* we know that c0 >= 0xf0 */ ) { in parse_utf8_char() 108 || UNEXPECTED((ch = *++cp) < (c0 == 0xf0 ? 0x90 : 0x80)) in parse_utf8_char() 110 || UNEXPECTED(ch > (c0 == 0xf4 ? 0x8f : 0xbf)) in parse_utf8_char()
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| /netbsd/src/external/bsd/tcpdump/dist/ |
| D | checksum.c | 115 uint32_t c0; in create_osi_cksum() local 120 c0 = 0; in create_osi_cksum() 129 c1 += c0; in create_osi_cksum() 132 c0 = c0 + *(pptr++); in create_osi_cksum() 133 c1 += c0; in create_osi_cksum() 137 c0 = c0 % 255; in create_osi_cksum() 140 mul = (length - checksum_offset)*(c0); in create_osi_cksum() 142 x = mul - c0 - c1; in create_osi_cksum()
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| /netbsd/src/external/lgpl3/gmp/dist/mpn/cray/ieee/ |
| D | addmul_1.c | 43 mp_limb_t a, b, r, s0, s1, c0, c1; in mpn_addmul_1() local 60 c0 = ((a & r) | ((a | r) & ~s0)) >> 63; in mpn_addmul_1() 61 cy[0] = c0; in mpn_addmul_1() 71 c0 = ((a & b) | ((a | b) & ~s0)) >> 63; in mpn_addmul_1() 76 cy[i] = c0 + c1; in mpn_addmul_1() 85 c0 = cy[i - 1]; in mpn_addmul_1() 86 s0 = r + c0; in mpn_addmul_1() 88 c0 = (r & ~s0) >> 63; in mpn_addmul_1() 89 more_carries += c0; in mpn_addmul_1() 101 c0 = r < cy[i - 1]; in mpn_addmul_1() [all …]
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| D | mul_basecase.c | 44 mp_limb_t a, b, r, s0, s1, c0, c1; in mpn_mul_basecase() local 63 c0 = ((a & r) | ((a | r) & ~s0)) >> 63; in mpn_mul_basecase() 64 cy[j] += c0; in mpn_mul_basecase() 72 c0 = ((a & b) | ((a | b) & ~s0)) >> 63; in mpn_mul_basecase() 77 cy[j + i] += c0 + c1; in mpn_mul_basecase() 87 c0 = cy[i - 1]; in mpn_mul_basecase() 88 s0 = r + c0; in mpn_mul_basecase() 90 c0 = (r & ~s0) >> 63; in mpn_mul_basecase() 91 more_carries += c0; in mpn_mul_basecase() 100 c0 = (r < cy[i - 1]); in mpn_mul_basecase() [all …]
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| D | sqr_basecase.c | 42 mp_limb_t a, b, r, s0, s1, c0, c1; in mpn_sqr_basecase() local 61 c0 = ((a & r) | ((a | r) & ~s0)) >> 63; in mpn_sqr_basecase() 62 cy[j] += c0; in mpn_sqr_basecase() 70 c0 = ((a & b) | ((a | b) & ~s0)) >> 63; in mpn_sqr_basecase() 75 cy[j + i] += c0 + c1; in mpn_sqr_basecase() 85 c0 = cy[i - 1]; in mpn_sqr_basecase() 86 s0 = r + c0; in mpn_sqr_basecase() 88 c0 = (r & ~s0) >> 63; in mpn_sqr_basecase() 89 more_carries += c0; in mpn_sqr_basecase() 98 c0 = (r < cy[i - 1]); in mpn_sqr_basecase() [all …]
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| D | mul_1.c | 42 mp_limb_t a, b, r, s0, s1, c0, c1; in mpn_mul_1() local 67 c0 = ((a & b) | ((a | b) & ~s0)) >> 63; in mpn_mul_1() 69 cy[i] = c0; in mpn_mul_1() 78 c0 = cy[i - 1]; in mpn_mul_1() 79 s0 = r + c0; in mpn_mul_1() 81 c0 = (r & ~s0) >> 63; in mpn_mul_1() 82 more_carries += c0; in mpn_mul_1() 93 c0 = (r == 0 && cy[i - 1] != 0); in mpn_mul_1() 97 cyrec = c0 | c1; in mpn_mul_1()
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| D | submul_1.c | 43 mp_limb_t a, b, r, s0, s1, c0, c1; in mpn_submul_1() local 71 c0 = ((a & b) | ((a | b) & ~s0)) >> 63; in mpn_submul_1() 76 cy[i] = c0 + c1; in mpn_submul_1() 85 c0 = cy[i - 1]; in mpn_submul_1() 86 s0 = r - c0; in mpn_submul_1() 88 c0 = (s0 & ~r) >> 63; in mpn_submul_1() 89 more_carries += c0; in mpn_submul_1() 101 c0 = ~r < cy[i - 1]; in mpn_submul_1() 105 cyrec = c0 | c1; in mpn_submul_1()
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| /netbsd/src/tests/ipf/input/ |
| D | f24 | 11 616e 7503 6564 7502 6175 0000 0100 01c0 16 c0a8 0101 cbe7 50c0 1300 0200 0100 0078 17 8c00 0603 6e73 31c0 13c0 1300 0200 0100 19 65c0 17c0 1300 0200 0100 0078 23 c0a8 0101 8c00 0603 756e 61c0 13c0 6b00 25 0100 0100 0018 4700 0481 7f28 03c0 3f00
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| /netbsd/src/sys/arch/evbarm/ixm1200/ |
| D | ixm1200_start.S | 62 mrc p15, 0, r0, c1, c0 ,0 /* read ctrl */ 72 mcr p15, 0, r0, c1, c0 ,0 /* write ctrl */ 80 mcr p15, 0, r0, c2, c0 ,0 /* write trans table base */ 84 mcr p15, 0, r0, c3, c0 ,0 /* write domain */ 94 mcr p15, 0, r0, c9, c0 ,0 /* flush all entries */ 95 mcr p15, 0, r0, c9, c0 ,4 /* disable user mode MCR access */ 99 mcr p15, 0, r0, c13, c0 ,0 /* process ID 0 103 mcr p15, 0, r0, c15, c0 ,0 /* DBAR = 0 */ 153 mcr p15, 0, r0, c2, c0 ,0 /* write trans table base */ 160 mrc p15, 0, r1, c1, c0 ,0 /* read ctrl */ [all …]
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| /netbsd/src/external/lgpl3/gmp/dist/mpn/cray/ |
| D | add_n.c | 41 mp_limb_t a, b, r, s0, c0, c1; in mpn_add_n() local 54 c0 = ((a & b) | ((a | b) & ~s0)) >> 63; in mpn_add_n() 55 cy[i] = c0; in mpn_add_n() 65 c0 = cy[i - 1]; in mpn_add_n() 66 s0 = r + c0; in mpn_add_n() 68 c0 = (r & ~s0) >> 63; in mpn_add_n() 69 more_carries += c0; in mpn_add_n() 80 c0 = (r == 0 && cy[i - 1] != 0); in mpn_add_n() 84 cyrec = c0 | c1; in mpn_add_n()
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| D | sub_n.c | 41 mp_limb_t a, b, r, s0, c0, c1; in mpn_sub_n() local 54 c0 = ((s0 & b) | ((s0 | b) & ~a)) >> 63; in mpn_sub_n() 55 cy[i] = c0; in mpn_sub_n() 65 c0 = cy[i - 1]; in mpn_sub_n() 66 s0 = r - c0; /* r = s0 + c0 */ in mpn_sub_n() 68 c0 = (s0 & ~r) >> 63; in mpn_sub_n() 69 more_carries += c0; in mpn_sub_n() 80 c0 = (~r == 0 && cy[i - 1] != 0); in mpn_sub_n() 84 cyrec = c0 | c1; in mpn_sub_n()
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| /netbsd/src/external/lgpl3/gmp/dist/mpn/generic/ |
| D | udiv_w_sdiv.c | 47 mp_limb_t c0, c1, b1; in mpn_udiv_w_sdiv() local 62 sub_ddmmss (c1, c0, a1, a0, d >> 1, d << (GMP_LIMB_BITS - 1)); in mpn_udiv_w_sdiv() 64 sdiv_qrnnd (q, r, c1, c0, d); in mpn_udiv_w_sdiv() 73 c0 = (a1 << (GMP_LIMB_BITS - 1)) + (a0 >> 1); in mpn_udiv_w_sdiv() 77 sdiv_qrnnd (q, r, c1, c0, b1); /* (A/2) / (d/2) */ in mpn_udiv_w_sdiv() 99 c0 = ~c0; /* logical NOT */ in mpn_udiv_w_sdiv() 101 sdiv_qrnnd (q, r, c1, c0, b1); /* (A/2) / (d/2) */ in mpn_udiv_w_sdiv()
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| /netbsd/src/sys/arch/evbarm/armadaxp/ |
| D | armadaxp_start.S | 72 mrc p15, 0, r2, c1, c0, 0 77 mcr p15, 0, r2, c1, c0, 0 101 mcr p15, 0, r0, c2, c0, 0 // Set TTBR0 103 mcr p15, 0, r0, c2, c0, 1 // Set TTBR1 108 mcr p15, 0, r0, c2, c0, 2 // TTBCR write 113 mcr p15, 0, r0, c13, c0, 1 // CONTEXTIDR write: Set ASID to 0 117 mcr p15, 0, r0, c3, c0, 0 // DACR write 123 mrc p15, 0, r0, c1, c0, 0 129 mcr p15, 0, r0, c1, c0, 0
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| /netbsd/src/lib/libc/locale/ |
| D | _wctrans.c | 82 __nbrune_t c0; in _towctrans_ext() local 92 c0 = (__nbrune_t)c; /* XXX assumes wchar_t = int */ in _towctrans_ext() 97 if (re->re_min <= c0 && re->re_max >= c0) in _towctrans_ext() 98 return (re->re_map + c0 - re->re_min); in _towctrans_ext() 99 else if (c0 >= re->re_max) { in _towctrans_ext()
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| /netbsd/src/sys/arch/evbarm/gumstix/ |
| D | gumstix_start.S | 87 mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ; \ 105 mrc p15, 0, ip, c1, c0, 0 107 mcr p15, 0, ip, c1, c0, 0 128 mrc p15, 0, r1, c0, c0, 0 171 mcr p15, 0, r1, c2, c0, 0 /* Set TTB */ 180 mcr p15, 0, r1, c3, c0, 0 183 mrc p15, 0, r1, c1, c0, 0 188 mcr p15, 0, r1, c1, c0, 0
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| /netbsd/src/sys/arch/evbarm/iq80310/ |
| D | iq80310_start.S | 53 mrc p15, 0, r2, c1, c0, 0 55 mcr p15, 0, r2, c1, c0, 0 113 mcr p15, 0, r0, c2, c0, 0 120 mcr p15, 0, r0, c3, c0, 0 126 mrc p15, 0, r2, c1, c0, 0 128 mcr p15, 0, r2, c1, c0, 0 135 mrc p15, 0, r2, c2, c0, 0 /* arbitrary read of CP15 */
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| /netbsd/src/sys/arch/evbarm/marvell/ |
| D | marvell_start.S | 88 mrc p15, 0, tmp, c2, c0, 0 /* arbitrary read of CP15 */ ;\ 143 mrc p15, 0, r4, c0, c0, 0 221 mcr p15, 0, r0, c2, c0, 0 /* Set TTB */ 224 mcreq p15, 0, r0, c2, c0, 1 /* Set TTB1 */ 226 mcreq p15, 0, r1, c2, c0, 2 /* Set TTBCR */ 230 mcreq p15, 0, r0, c13, c0, 1 /* Set ASID to 0 */ 238 mcr p15, 0, r0, c3, c0, 0 241 mrc p15, 0, r0, c1, c0, 0 249 mcr p15, 0, r0, c1, c0, 0
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| /netbsd/src/sys/arch/evbarm/iq80321/ |
| D | iq80321_start.S | 59 mrc p15, 0, r2, c1, c0, 0 61 mcr p15, 0, r2, c1, c0, 0 122 mcr p15, 0, r0, c2, c0, 0 129 mcr p15, 0, r0, c3, c0, 0 135 mrc p15, 0, r2, c1, c0, 0 137 mcr p15, 0, r2, c1, c0, 0 144 mrc p15, 0, r2, c2, c0, 0 /* arbitrary read of CP15 */
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| /netbsd/src/sys/arch/acorn32/stand/boot32/ |
| D | start.S | 53 …mrc p15, 0, r0, c0, c0, 0 /* read CPU id in … 80 …mcreq p15, 0, r0, c7, c0, 0 /* flush v3 ID cac… 85 …mcr p15, 0, r0, c5, c0, 0 /* flush TLB for v… 89 …mrcne p15, 0, r0, c1, c0, 0 /* read processor … 95 …mcr p15, 0, r0, c1, c0, 0 /* write control r… 135 …mcreq p15, 0, r0, c7, c0, 0 /* flush v3 ID cac… 144 …mcr p15, 0, r0, c5, c0, 0 /* flush TLB for v… 148 …mcr p15, 0, r0, c2, c0, 0 /* write TLB addre… 153 …mcr p15, 0, r0, c1, c0, 0 /* write register …
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