| /netbsd/src/external/bsd/atf/dist/atf-c/ |
| D | macros_test.c | 422 H_CHECK_EQ(1_2, 1, 2); 424 H_CHECK_EQ(2_2, 2, 2); 426 H_CHECK_EQ_MSG(1_2, 1, 2, "1 does not match 2"); 428 H_CHECK_EQ_MSG(2_2, 2, 2, "2 does not match 2"); 441 { H_CHECK_EQ_HEAD_NAME(1_2), H_CHECK_EQ_BODY_NAME(1_2), in ATF_TC_BODY() 445 { H_CHECK_EQ_HEAD_NAME(2_2), H_CHECK_EQ_BODY_NAME(2_2), in ATF_TC_BODY() 449 { H_CHECK_EQ_MSG_HEAD_NAME(1_2), H_CHECK_EQ_MSG_BODY_NAME(1_2), in ATF_TC_BODY() 453 { H_CHECK_EQ_MSG_HEAD_NAME(2_2), H_CHECK_EQ_MSG_BODY_NAME(2_2), in ATF_TC_BODY() 461 H_CHECK_STREQ(1_2, "1", "2"); 463 H_CHECK_STREQ(2_2, "2", "2"); [all …]
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| /netbsd/src/lib/libc/gdtoa/test/ |
| D | xLtest.c | 71 #define _2 2 macro 76 #define _2 0 macro 109 u.bits[_2] = (ULong)strtoul(s1=se, &se, 16); in main() 113 U u.bits[_1], U u.bits[_2]); in main() 125 U u.bits[_0], U u.bits[_1], U u.bits[_2]); in main() 143 U v[0].bits[_2]); in main() 151 U v[0].bits[_2]); in main() 156 U v[1].bits[_2]); in main()
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| D | xtest.c | 69 #define _2 2 macro 76 #define _2 2 macro 106 &u.bits[_1], &u.bits[_2], &u.bits[_3], in main() 110 u.bits[_1], u.bits[_2], u.bits[_3], u.bits[_4]); in main() 122 u.bits[_0], u.bits[_1], u.bits[_2], in main() 141 v[0].bits[_2], v[0].bits[_3], in main() 150 v[0].bits[_2], v[0].bits[_3], in main() 156 v[1].bits[_2], v[1].bits[_3], in main()
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| D | Qtest.c | 68 #define _2 2 macro 74 #define _2 1 macro 115 u.bits[_2] = (ULong)strtoul(s1 = se, &se, 16); in main() 122 U u.bits[_1], U u.bits[_2], U u.bits[_3]); in main() 134 U u.bits[_0], U u.bits[_1], U u.bits[_2], U u.bits[_3]); in main() 152 U v[0].bits[_2], U v[0].bits[_3]); in main() 160 U v[0].bits[_2], U v[0].bits[_3]); in main() 165 U v[1].bits[_2], U v[1].bits[_3]); in main()
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| /netbsd/src/lib/libc/gdtoa/ |
| D | strtopQ.c | 44 #define _2 2 macro 50 #define _2 1 macro 80 L[_2] = bits[1]; in strtopQ() 87 L[_2] = bits[1]; in strtopQ() 94 L[_1] = L[_2] = L[_3] = 0; in strtopQ()
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| D | strtorQ.c | 44 #define _2 2 macro 50 #define _2 1 macro 70 L[_2] = bits[1]; 77 L[_2] = bits[1]; 84 L[_1] = L[_2] = L[_3] = 0;
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| D | strtopxL.c | 44 #define _2 2 macro 49 #define _2 0 macro 78 L[_2] = bits[0]; in strtopxL() 86 L[_2] = 0; in strtopxL()
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| D | strtopx.c | 44 #define _2 2 macro 51 #define _2 2 macro 89 L[_2] = (UShort)bits[1]; in strtopx() 96 L[_2] = L[_3] = L[_4] = 0; in strtopx()
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| D | strtorxL.c | 44 #define _2 2 macro 49 #define _2 0 macro 70 L[_2] = bits[0]; 76 L[_2] = 0;
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| D | strtorx.c | 44 #define _2 2 macro 51 #define _2 2 macro 79 L[_2] = (UShort)bits[1]; 86 L[_2] = L[_3] = L[_4] = 0;
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| D | g_xLfmt.c | 44 #define _2 2 macro 49 #define _2 0 macro 77 bits[0] = L[_2];
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| D | g_xfmt.c | 44 #define _2 2 macro 51 #define _2 2 macro 81 bits[1] = (L[_1] << 16) | L[_2];
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| D | g_Qfmt.c | 44 #define _2 2 macro 50 #define _2 1 macro 80 bits[1] = L[_2];
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| /netbsd/src/external/gpl3/gdb/dist/sim/cr16/ |
| D | cr16-sim.h | 89 unsigned_2 _2; member 115 SLOT[SLOT_NR].data._2 = (unsigned_2) (VAL); \ 116 SLOT[SLOT_NR].mask._2 = (unsigned_2) (MSK); \ 141 *(unsigned_2*) SLOT[i].dest &= SLOT[i].mask._2; \ 142 *(unsigned_2*) SLOT[i].dest |= SLOT[i].data._2; \ 170 (unsigned) SLOT[i].mask._2, \ 171 (unsigned) SLOT[i].data._2); \
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| /netbsd/src/external/gpl3/gdb/dist/sim/d10v/ |
| D | d10v-sim.h | 83 unsigned_2 _2; member 110 SLOT[SLOT_NR].data._2 = (unsigned_2) (VAL); \ 111 SLOT[SLOT_NR].mask._2 = (unsigned_2) (MSK); \ 140 *(unsigned_2*) SLOT[i].dest &= SLOT[i].mask._2; \ 141 *(unsigned_2*) SLOT[i].dest |= SLOT[i].data._2; \ 173 (unsigned) SLOT[i].mask._2, \ 174 (unsigned) SLOT[i].data._2); \
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| /netbsd/src/common/lib/libc/arch/aarch64/atomic/ |
| D | atomic_op_asm.h | 92 ENTRY_NP(__sync_fetch_and_##OP##_2) ;\ 101 END(__sync_fetch_and_##OP##_2)
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| /netbsd/src/external/gpl3/gcc/dist/gcc/config/ia64/ |
| D | itanium2.md | 1098 (define_query_cpu_unit "2_1,2_2,2_3,2_4,2_5,2_6" "twob") 1348 |(2b_0mm.i|2b_0mm.f|2b_0mm.b)+2_2\ 1357 |(2b_0mm.i|2b_0mm.f|2b_0mm.b)+2_2\ 1366 |(2b_0mm.i|2b_0mm.f|2b_0mm.b)+2_2\ 1375 |(2b_0mm.i|2b_0mm.f|2b_0mm.b)+2_2\ 1384 |(2b_0mm.i|2b_0mm.f|2b_0mm.b)+2_2\ 1391 "2b_0mi.i+2_2+2b_ui0|2b_0mii.+2_3+(2b_ui0|2b_ui1)|2b_0mmi.+2_3+2b_ui0\ 1392 |2b_0mfi.+2_3+2b_ui0|2b_0mi.b+2_2+2b_ui0\ 1399 "2b_0mf.i+2_2+2b_uf0|2b_0mmf.+2_3+2b_uf0|2b_0mf.b+2_2+2b_uf0\ 1406 "2b_0b.bb+2_1+2b_unb0|2b_0bb.b+2_2+2b_unb1|2b_0bbb.+2_3+2b_unb2\ [all …]
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| /netbsd/src/external/gpl3/gcc/dist/gcc/ |
| D | builtin-attrs.def | 351 DEF_FORMAT_ATTRIBUTE(PRINTF,1,1_2) 362 DEF_FORMAT_ATTRIBUTE_NONNULL(PRINTF,1,1_2) 381 DEF_FORMAT_ATTRIBUTE(SCANF,1,1_2)
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| D | ChangeLog-2019 | 3893 (*cond_uxt<mode>_2): Update comment. 8300 (*cond_<MUL_HIGHPART:optab><mode>_2): New pattern. 8313 (*cond_asrd<mode>_2, *cond_asrd<mode>_z): New patterns. 8314 (sdiv_pow2<mode>3): Expand to *cond_asrd<mode>_2. 8317 (*cond_<SVE_COND_FP_BINARY_INT:optab><mode>_2): New pattern. 8330 (*cond_<SVE_COND_FCADD:optab><mode>_2): New pattern. 8698 * config/i386/sse.md (sse_cvtss2si<rex64namesuffix>_2): 9556 * config/i386/sse.md (*sse4_1_<code>v8qiv8hi2<mask_name>_2, 9557 *avx2_<code>v8qiv8si2<mask_name>_2, 9558 *sse4_1_<code>v4qiv4si2<mask_name>_2, [all …]
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| /netbsd/src/usr.bin/error/ |
| D | error.h | 241 #define USE_S3(sym) sym##_2, USE_S2(sym)
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| /netbsd/src/sys/external/bsd/acpica/dist/include/platform/ |
| D | acefi.h | 238 _0,_1,_2,_3,_4,_5,_6,_7,_8,_9,_10,N,...) N argument
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| /netbsd/src/external/bsd/file/dist/magic/magdir/ |
| D | os2 | 145 # langversionID; like: 7_1~German 7_2~Swiss German 12_1~French 12_3~Canadian French
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| /netbsd/src/external/gpl3/gcc/dist/gcc/config/avr/ |
| D | avr-fixed.md | 254 "%~call __<code_stdname>_2"
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| /netbsd/src/external/gpl3/gcc/dist/libstdc++-v3/include/std/ |
| D | chrono | 1513 // Since 30 = (11110)_2 and __m <= 31 = (11111)_2, the "& 1" in b's
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| /netbsd/src/external/gpl3/gcc/dist/gcc/config/i386/ |
| D | sse.md | 3464 (define_insn_and_split "*avx_cmp<mode>3_2" 3758 (define_insn_and_split "*<avx512>_cmp<V48H_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2" 3859 (define_insn_and_split "*<avx512>_cmp<VI12_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2" 3978 (define_insn_and_split "*<avx512>_ucmp<VI12_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2" 4077 (define_insn_and_split "*<avx512>_ucmp<VI48_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2" 7026 (define_insn "avx512fp16_vcvtsh2<sseintconvertsignprefix>si<rex64namesuffix>_2" 7680 (define_insn "sse_cvtss2si<rex64namesuffix>_2" 8125 (define_insn "sse2_cvtsd2si<rex64namesuffix>_2" 12354 (define_insn_and_split "*<avx512>_vpternlog<mode>_2" 16275 (define_insn_and_split "*avx2_pcmp<mode>3_2" [all …]
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