Searched refs:VR4122_MPCIINT_REG_W (Results 1 – 2 of 2) sorted by relevance
372 #define VR4122_MPCIINT_REG_W 0x32 /* Level2 PCI intr mask */ macro382 #define MPCIINT_REG_W VR4122_MPCIINT_REG_W
79 VR4122_PCIINT_REG_W,VR4122_MPCIINT_REG_W },