Searched refs:VR4102_MDSIUINT_REG_W (Results 1 – 2 of 2) sorted by relevance
197 #define VR4102_MDSIUINT_REG_W 0x016 /* Level2 Mask DSIU intr reg */ macro205 #define MDSIUINT_REG_W VR4102_MDSIUINT_REG_W
87 VR4102_DSIUINT_REG_W,VR4102_MDSIUINT_REG_W },