| /netbsd/src/external/gpl3/binutils/dist/opcodes/ |
| D | mips16-opc.c | 163 #define UBD INSN_UNCOND_BRANCH_DELAY macro 325 {"jalr", "x", 0xe840, 0xf8ff, RD_1|WR_31|UBD, SH, … 326 {"jalr", "R,x", 0xe840, 0xf8ff, RD_2|WR_31|UBD, SH, … 327 {"jal", "x", 0xe840, 0xf8ff, RD_1|WR_31|UBD, SH, … 328 {"jal", "R,x", 0xe840, 0xf8ff, RD_2|WR_31|UBD, SH, … 329 {"jal", "a", 0x18000000, 0xfc000000, WR_31|UBD, 0, … 330 {"jalx", "i", 0x1c000000, 0xfc000000, WR_31|UBD, 0, … 331 {"jr", "x", 0xe800, 0xf8ff, RD_1|UBD, SH, I1, … 332 {"jr", "R", 0xe820, 0xffff, UBD, SH|RD_31, I1, … 333 {"j", "x", 0xe800, 0xf8ff, RD_1|UBD, SH, I1, … [all …]
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| D | micromips-opc.c | 200 #define UBD INSN_UNCOND_BRANCH_DELAY macro 311 {"b", "mD", 0xcc00, 0xfc00, UBD, … 312 {"b", "p", 0x94000000, 0xffff0000, UBD, … 313 {"b", "p", 0x40400000, 0xffff0000, UBD, … 317 {"bal", "p", 0x40600000, 0xffff0000, WR_31|UBD, … 318 {"bals", "p", 0x42600000, 0xffff0000, WR_31|UBD, … 706 {"jr", "mj", 0x4580, 0xffe0, RD_1|UBD, … 707 {"jr", "s", 0x00000f3c, 0xffe0ffff, RD_1|UBD, … 708 {"jrs", "s", 0x00004f3c, 0xffe0ffff, RD_1|UBD, … 713 {"jr.hb", "s", 0x00001f3c, 0xffe0ffff, RD_1|UBD, BD32, … [all …]
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| D | mips-opc.c | 222 #define UBD INSN_UNCOND_BRANCH_DELAY macro 464 {"b", "p", 0x10000000, 0xffff0000, UBD, … 465 {"b", "p", 0x04010000, 0xffff0000, UBD, … 466 {"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, … 467 {"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, … 1214 {"jr", "s", 0x00000009, 0xfc1fffff, RD_1|UBD, … 1215 {"jr", "s", 0x00000008, 0xfc1fffff, RD_1|UBD, … 1219 {"jr.hb", "s", 0x00000409, 0xfc1fffff, RD_1|UBD, INSN2_ALI… 1220 {"jr.hb", "s", 0x00000408, 0xfc1fffff, RD_1|UBD, 0, … 1221 {"j", "s", 0x00000009, 0xfc1fffff, RD_1|UBD, … [all …]
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| /netbsd/src/external/gpl3/gdb/dist/opcodes/ |
| D | mips16-opc.c | 163 #define UBD INSN_UNCOND_BRANCH_DELAY macro 325 {"jalr", "x", 0xe840, 0xf8ff, RD_1|WR_31|UBD, SH, … 326 {"jalr", "R,x", 0xe840, 0xf8ff, RD_2|WR_31|UBD, SH, … 327 {"jal", "x", 0xe840, 0xf8ff, RD_1|WR_31|UBD, SH, … 328 {"jal", "R,x", 0xe840, 0xf8ff, RD_2|WR_31|UBD, SH, … 329 {"jal", "a", 0x18000000, 0xfc000000, WR_31|UBD, 0, … 330 {"jalx", "i", 0x1c000000, 0xfc000000, WR_31|UBD, 0, … 331 {"jr", "x", 0xe800, 0xf8ff, RD_1|UBD, SH, I1, … 332 {"jr", "R", 0xe820, 0xffff, UBD, SH|RD_31, I1, … 333 {"j", "x", 0xe800, 0xf8ff, RD_1|UBD, SH, I1, … [all …]
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| D | micromips-opc.c | 200 #define UBD INSN_UNCOND_BRANCH_DELAY macro 311 {"b", "mD", 0xcc00, 0xfc00, UBD, … 312 {"b", "p", 0x94000000, 0xffff0000, UBD, … 313 {"b", "p", 0x40400000, 0xffff0000, UBD, … 317 {"bal", "p", 0x40600000, 0xffff0000, WR_31|UBD, … 318 {"bals", "p", 0x42600000, 0xffff0000, WR_31|UBD, … 706 {"jr", "mj", 0x4580, 0xffe0, RD_1|UBD, … 707 {"jr", "s", 0x00000f3c, 0xffe0ffff, RD_1|UBD, … 708 {"jrs", "s", 0x00004f3c, 0xffe0ffff, RD_1|UBD, … 713 {"jr.hb", "s", 0x00001f3c, 0xffe0ffff, RD_1|UBD, BD32, … [all …]
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| D | mips-opc.c | 222 #define UBD INSN_UNCOND_BRANCH_DELAY macro 464 {"b", "p", 0x10000000, 0xffff0000, UBD, … 465 {"b", "p", 0x04010000, 0xffff0000, UBD, … 466 {"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, … 467 {"bal", "p", 0x04110000, 0xffff0000, WR_31|UBD, … 1214 {"jr", "s", 0x00000009, 0xfc1fffff, RD_1|UBD, … 1215 {"jr", "s", 0x00000008, 0xfc1fffff, RD_1|UBD, … 1219 {"jr.hb", "s", 0x00000409, 0xfc1fffff, RD_1|UBD, INSN2_ALI… 1220 {"jr.hb", "s", 0x00000408, 0xfc1fffff, RD_1|UBD, 0, … 1221 {"j", "s", 0x00000009, 0xfc1fffff, RD_1|UBD, … [all …]
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