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Searched refs:TCR_IRGN0 (Results 1 – 1 of 1) sorted by relevance

/netbsd/src/sys/arch/aarch64/include/
Darmreg.h1139 #define TCR_IRGN0 __BITS(9,8) /* TTBR0 Inner cacheability */ macro
1140 #define TCR_IRGN0_NC __SHIFTIN(0,TCR_IRGN0) /* Non Cacheable */
1141 #define TCR_IRGN0_WB_WA __SHIFTIN(1,TCR_IRGN0) /* WriteBack WriteAllocate */
1142 #define TCR_IRGN0_WT __SHIFTIN(2,TCR_IRGN0) /* WriteThrough */
1143 #define TCR_IRGN0_WB __SHIFTIN(3,TCR_IRGN0) /* WriteBack */