1 /* $NetBSD: simidereg.h,v 1.1 2001/10/05 22:27:59 reinoud Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Mark Brinicombe 5 * Copyright (c) 1997 Causality Limited 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Mark Brinicombe 18 * for the NetBSD Project. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Thanks to Gareth Simpson, Simtec Electronics for providing 36 * the hardware information. 37 */ 38 39 /* 40 * Registers and address offsets for the Simtec IDE card. 41 */ 42 43 /* IDE drive registers */ 44 45 #define PRIMARY_DRIVE_REGISTERS_POFFSET 0x0000 46 #define PRIMARY_AUX_REGISTER_POFFSET 0x0700 47 48 #define SECONDARY_DRIVE_REGISTERS_POFFSET 0x1000 49 #define SECONDARY_AUX_REGISTER_POFFSET 0x1700 50 51 #define DRIVE_REGISTERS_SPACE 0x800 52 #define DRIVE_REGISTER_BYTE_SPACING 128 53 #define DRIVE_REGISTER_SPACING_SHIFT 7 54 55 /* Other registers */ 56 57 #define CONTROL_REGISTERS_POFFSET 0x2000 58 #define CONTROL_REGISTER_SPACE 8 59 #define CONTROL_REGISTER_OFFSET 0 60 #define CONTROL_RESET 0x80 61 #define CONTROL_IORDY 0x40 62 #define CONTROL_8_BIT 0x20 63 #define CONTROL_IDE_ENABLE 0x10 64 #define CONTROL_SLOW_MODE_OFF 0x08 65 #define CONTROL_ROM_WRITE 0x04 66 #define CONTROL_SECONDARY_IRQ 0x02 67 #define CONTROL_PRIMARY_IRQ 0x01 68 69 #define STATUS_REGISTER_OFFSET 1 70 #define STATUS_RESET 0x80 71 #define STATUS_IORDY 0x40 72 #define STATUS_ADDR_TEST 0x20 73 #define STATUS_CS_TEST 0x10 74 #define STATUS_RW_TEST 0x08 75 #define STATUS_IRQ 0x01 76 77 #define STATUS_FAULT (STATUS_ADDR_TEST | STATUS_CS_TEST \ 78 | STATUS_RW_TEST | STATUS_RESET) 79