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Searched refs:SRLV (Results 1 – 10 of 10) sorted by relevance

/netbsd/src/sys/arch/mips/mips/
Dbds_emul.S270 PTR_WORD bcemul_special_genshiftv # 006 SRLV
373 jr ra; srlv t0, v0, v1 # 006 SRLV
/netbsd/src/sys/external/bsd/sljit/dist/sljit_src/
DsljitNativeMIPS_32.c405 EMIT_SHIFT(SRL, SRLV); in emit_single_op()
DsljitNativeMIPS_64.c499 EMIT_SHIFT(DSRL, DSRL32, SRL, DSRLV, SRLV); in emit_single_op()
DsljitNativeMIPS_common.c165 #define SRLV (HI(0) | LO(6)) macro
/netbsd/src/external/gpl3/gdb/dist/sim/mips/
Dm16.igen838 11101,3.RX,3.RY,00110:RR:16::SRLV
Dmicromips.igen1922 000000,5.RT,5.RS,5.RD,00001,010000:POOL32A:32::SRLV
Dmips.igen4684 000000,5.RS,5.RT,5.RD,00000,000110:SPECIAL:32::SRLV
DChangeLog-20211859 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
/netbsd/src/external/gpl3/binutils/dist/cpu/
Diq2000.cpu263 …(("SLL" 0) ("SLMV" 1) ("SRL" 2) ("SRA" 3) ("SLLV" 4) ("SRMV" 5) ("SRLV" 6) ("SRAV" 7…
/netbsd/src/external/gpl3/gdb/dist/cpu/
Diq2000.cpu263 …(("SLL" 0) ("SLMV" 1) ("SRL" 2) ("SRA" 3) ("SLLV" 4) ("SRMV" 5) ("SRLV" 6) ("SRAV" 7…