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Searched refs:SRIDX (Results 1 – 4 of 4) sorted by relevance

/netbsd/src/external/gpl3/gdb/dist/opcodes/
Dnds32-asm.c55 #define SRIDX(major, minor, ext) \ macro
433 …{"setend.l", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (5), 4, ATTR_ALL, 0, NULL, 0, NU…
434 …{"setend.b", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (5) | N32_BIT (20), 4, ATTR_ALL,…
436 …{"setgie.d", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (6), 4, ATTR_ALL, 0, NULL, 0, NU…
437 …{"setgie.e", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (6) | N32_BIT (20), 4, ATTR_ALL,…
1205 {"cpu_ver", SRIDX (0, 0, 0), 0}, {"cr0", SRIDX (0, 0, 0), 0},
1206 {"icm_cfg", SRIDX (0, 1, 0), 0}, {"cr1", SRIDX (0, 1, 0), 0},
1207 {"dcm_cfg", SRIDX (0, 2, 0), 0}, {"cr2", SRIDX (0, 2, 0), 0},
1208 {"mmu_cfg", SRIDX (0, 3, 0), 0}, {"cr3", SRIDX (0, 3, 0), 0},
1209 {"msc_cfg", SRIDX (0, 4, 0), 0}, {"cr4", SRIDX (0, 4, 0), 0},
[all …]
/netbsd/src/external/gpl3/binutils/dist/opcodes/
Dnds32-asm.c55 #define SRIDX(major, minor, ext) \ macro
433 …{"setend.l", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (5), 4, ATTR_ALL, 0, NULL, 0, NU…
434 …{"setend.b", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (5) | N32_BIT (20), 4, ATTR_ALL,…
436 …{"setgie.d", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (6), 4, ATTR_ALL, 0, NULL, 0, NU…
437 …{"setgie.e", "", MISC (MTSR) | (SRIDX (1, 0, 0) << 10) | N32_BIT (6) | N32_BIT (20), 4, ATTR_ALL,…
1205 {"cpu_ver", SRIDX (0, 0, 0), 0}, {"cr0", SRIDX (0, 0, 0), 0},
1206 {"icm_cfg", SRIDX (0, 1, 0), 0}, {"cr1", SRIDX (0, 1, 0), 0},
1207 {"dcm_cfg", SRIDX (0, 2, 0), 0}, {"cr2", SRIDX (0, 2, 0), 0},
1208 {"mmu_cfg", SRIDX (0, 3, 0), 0}, {"cr3", SRIDX (0, 3, 0), 0},
1209 {"msc_cfg", SRIDX (0, 4, 0), 0}, {"cr4", SRIDX (0, 4, 0), 0},
[all …]
/netbsd/src/external/gpl3/gdb/dist/sim/mips/
Dsim-main.h342 #define SRIDX (32) macro
343 #define SR (REGISTERS[SRIDX]) /* CPU status register */
Dinterp.c673 else if ((rn == SRIDX) in sim_open()