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Searched refs:SAR (Results 1 – 18 of 18) sorted by relevance

/netbsd/src/external/gpl3/binutils/dist/gas/config/
Drl78-parse.h152 SAR = 353, /* SAR */ enumerator
277 #define SAR 353 macro
Drl78-parse.y178 %token SAR SARW SEL SET1 SHL SHLW SHR SHRW
959 | SAR A ',' EXPR
1322 OPC(SAR),
Drl78-parse.c338 SAR = 353, /* SAR */ enumerator
463 #define SAR 353 macro
4566 OPC(SAR),
/netbsd/src/share/misc/
Dacronyms516 SAR search and rescue
517 SAR some assembly required
Dairport6835 SAR:Sparta (Hunter Field), IL, USA
/netbsd/src/sys/external/bsd/sljit/dist/sljit_src/
DsljitNativeX86_common.c232 #define SAR (/* SHIFT */ 7 << 3) macro
923 *inst |= SAR; in emit_mov_byte()
2167 return emit_shift_with_flags(compiler, SAR, HAS_FLAGS(op),
/netbsd/src/external/gpl3/gdb/dist/gdb/
Dmep-tdep.c672 { CSR(SAR), 0x0000003f },
/netbsd/src/external/bsd/file/dist/magic/magdir/
Darchive507 # SAR
508 3 string LH5 SAR archive data
/netbsd/src/external/gpl3/gdb/dist/sim/v850/
Dv850.igen1512 // SAR
/netbsd/src/external/gpl3/gdb/dist/cpu/
Dmep-core.cpu485 (df f-2u6 "SAR offset (2 bits)" (all-mep-core-isas) 6 2 UINT #f #f)
/netbsd/src/external/gpl3/binutils/dist/cpu/
Dmep-core.cpu485 (df f-2u6 "SAR offset (2 bits)" (all-mep-core-isas) 6 2 UINT #f #f)
/netbsd/src/external/gpl3/gcc/dist/gcc/config/pa/
Dpa.md9676 ;; Loop counter in memory or SAR case.
/netbsd/src/external/gpl3/gcc/dist/gcc/
DChangeLog-200432701 SAR register.
35910 SAR register. Fix comment.
35911 (ADDITIONAL_REGISTER_NAMES): Correct register number of SAR register
DFSFChangeLog.116899 to the SAR register if the input is a MEM with an offset that won't
DChangeLog-19997391 register when performing secondary reloads for the SAR register.
DChangeLog-200124812 * pa.c (secondary_reload_class): SAR<->FP copies require a
DChangeLog-200913393 for mode mode of operand0 when doing secondary reload for SAR.
/netbsd/src/doc/
DCHANGES.prev11905 mcp3kadc(4): Driver for Microchip 3x0x SAR ADC chips. [phx 20150818]