| /netbsd/src/external/bsd/libpcap/dist/msdos/ |
| D | pktdrvr.c | 320 union REGS r; in PktInterrupt() 1285 union REGS r; in dpmi_get_real_vector() 1295 union REGS r; in dpmi_real_malloc() 1309 union REGS r; in dpmi_real_free()
|
| /netbsd/src/external/gpl3/gdb/dist/opcodes/ |
| D | m10300-opc.c | 215 #define REGS (REGS_SHIFT8+1) macro 219 #define USP (REGS+1) 756 { "movm", 0xce00, 0xff00, 0, FMT_S1, 0, {MEM(SP), REGS}}, 757 { "movm", 0xcf00, 0xff00, 0, FMT_S1, 0, {REGS, MEM(SP)}}, 758 { "movm", 0xf8ce00, 0xffff00, 0, FMT_D1, AM33, {MEM(USP), REGS}}, 759 { "movm", 0xf8cf00, 0xffff00, 0, FMT_D1, AM33, {REGS, MEM(USP)}}, 1010 { "call", 0xcd000000, 0xff000000, 0, FMT_S4, 0, {D16_SHIFT,REGS,IMM8E}},
|
| D | ChangeLog-9297 | 1298 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register 1300 (mn10300_opcodes): Use REGS for register list in "movm" instructions. 1433 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
|
| /netbsd/src/external/gpl3/binutils/dist/opcodes/ |
| D | m10300-opc.c | 215 #define REGS (REGS_SHIFT8+1) macro 219 #define USP (REGS+1) 756 { "movm", 0xce00, 0xff00, 0, FMT_S1, 0, {MEM(SP), REGS}}, 757 { "movm", 0xcf00, 0xff00, 0, FMT_S1, 0, {REGS, MEM(SP)}}, 758 { "movm", 0xf8ce00, 0xffff00, 0, FMT_D1, AM33, {MEM(USP), REGS}}, 759 { "movm", 0xf8cf00, 0xffff00, 0, FMT_D1, AM33, {REGS, MEM(USP)}}, 1010 { "call", 0xcd000000, 0xff000000, 0, FMT_S4, 0, {D16_SHIFT,REGS,IMM8E}},
|
| D | ChangeLog-9297 | 1298 * mn10300-opc.c (mn10300_operands): Add "REGS" for a register 1300 (mn10300_opcodes): Use REGS for register list in "movm" instructions. 1433 * mn10300-opc.c (mn10300_operands): Remove "REGS" operand.
|
| /netbsd/src/external/gpl3/gdb/dist/sim/mn10300/ |
| D | mn10300.igen | 3969 8.0xce+8.REGS:S1:::movm 3982 mask = REGS; 4068 8.0xcf+8.REGS:S1a:::movm 4081 mask = REGS; 4167 8.0xcd+8.D16A+8.D16B+8.REGS+8.IMM8:S4:::call 4184 mask = REGS; 4276 8.0xdd+8.D32A+8.D32B+8.D32C+8.D32D+8.REGS+8.IMM8:S6:::call 4294 mask = REGS; 4385 8.0xdf+8.REGS+8.IMM8:S2:::ret 4402 mask = REGS; [all …]
|
| D | am33.igen | 205 8.0xf8+8.0xce+8.REGS:D1a:::movm 214 mask = REGS; 299 8.0xf8+8.0xcf+8.REGS:D1b:::movm 308 mask = REGS;
|
| /netbsd/src/external/gpl3/gdb/dist/gdb/ |
| D | aarch64-tdep.c | 4770 #define REG_ALLOC(REGS, LENGTH, RECORD_BUF) \ argument 4776 REGS = XNEWVEC (uint32_t, reg_len); \ 4777 memcpy(®S[0], &RECORD_BUF[0], sizeof(uint32_t)*LENGTH); \
|
| D | arm-tdep.c | 11166 #define REG_ALLOC(REGS, LENGTH, RECORD_BUF) \ argument 11172 REGS = XNEWVEC (uint32_t, reg_len); \ 11173 memcpy(®S[0], &RECORD_BUF[0], sizeof(uint32_t)*LENGTH); \
|
| D | ChangeLog-2007 | 7772 instead of current_regcache. Make REGS const. 7813 REGCACHE argument; replace current_regcache. Make REGS const. 7870 pass it to alpha_supply_ routines. Make REGS const.
|
| D | ChangeLog-2011 | 2702 REGS.PREV only after CIE execution.
|
| /netbsd/src/doc/ |
| D | CHANGES.prev | 1767 gdb(1): Made GDB use PT_GET*REGS and PT_SET*REGS, and removed PT_READ_U
|
| /netbsd/src/external/gpl3/gcc/dist/gcc/ |
| D | ChangeLog-2010 | 18980 If CHECK_REGS is false, don't sort REGS. Handle Thumb mode. 18984 If CHECK_REGS is false, don't sort REGS. Set up REG_RTXS just 18985 like REGS. Handle Thumb mode.
|
| /netbsd/src/external/gpl3/gcc/dist/gcc/doc/ |
| D | gccint.info | 37117 -- Target Hook: void TARGET_EXTRA_LIVE_ON_ENTRY (bitmap REGS) 37118 Add any hard registers to REGS that are live on entry to the
|
| /netbsd/src/crypto/external/bsd/heimdal/dist/lib/wind/ |
| D | NormalizationTest.txt | 5404 B80B;B80B;1105 1166 11AA;B80B;1105 1166 11AA; # (렋; 렋; 렋; 렋; 렋; ) HANGUL SYLLABLE REGS
|