1 /* Target-dependent code for Analog Devices Blackfin processor, for GDB.
2
3 Copyright (C) 2005-2024 Free Software Foundation, Inc.
4
5 Contributed by Analog Devices, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "extract-store-integer.h"
23 #include "inferior.h"
24 #include "gdbcore.h"
25 #include "arch-utils.h"
26 #include "regcache.h"
27 #include "frame.h"
28 #include "frame-unwind.h"
29 #include "frame-base.h"
30 #include "trad-frame.h"
31 #include "dis-asm.h"
32 #include "sim-regno.h"
33 #include "sim/sim-bfin.h"
34 #include "dwarf2/frame.h"
35 #include "symtab.h"
36 #include "elf-bfd.h"
37 #include "elf/bfin.h"
38 #include "osabi.h"
39 #include "infcall.h"
40 #include "xml-syscall.h"
41 #include "bfin-tdep.h"
42
43 /* Macros used by prologue functions. */
44 #define P_LINKAGE 0xE800
45 #define P_MINUS_SP1 0x0140
46 #define P_MINUS_SP2 0x05C0
47 #define P_MINUS_SP3 0x0540
48 #define P_MINUS_SP4 0x04C0
49 #define P_SP_PLUS 0x6C06
50 #define P_P2_LOW 0xE10A
51 #define P_P2_HIGH 0XE14A
52 #define P_SP_EQ_SP_PLUS_P2 0X5BB2
53 #define P_SP_EQ_P2_PLUS_SP 0x5B96
54 #define P_MINUS_MINUS_SP_EQ_RETS 0x0167
55
56 /* Macros used for program flow control. */
57 /* 16 bit instruction, max */
58 #define P_16_BIT_INSR_MAX 0xBFFF
59 /* 32 bit instruction, min */
60 #define P_32_BIT_INSR_MIN 0xC000
61 /* 32 bit instruction, max */
62 #define P_32_BIT_INSR_MAX 0xE801
63 /* jump (preg), 16-bit, min */
64 #define P_JUMP_PREG_MIN 0x0050
65 /* jump (preg), 16-bit, max */
66 #define P_JUMP_PREG_MAX 0x0057
67 /* jump (pc+preg), 16-bit, min */
68 #define P_JUMP_PC_PLUS_PREG_MIN 0x0080
69 /* jump (pc+preg), 16-bit, max */
70 #define P_JUMP_PC_PLUS_PREG_MAX 0x0087
71 /* jump.s pcrel13m2, 16-bit, min */
72 #define P_JUMP_S_MIN 0x2000
73 /* jump.s pcrel13m2, 16-bit, max */
74 #define P_JUMP_S_MAX 0x2FFF
75 /* jump.l pcrel25m2, 32-bit, min */
76 #define P_JUMP_L_MIN 0xE200
77 /* jump.l pcrel25m2, 32-bit, max */
78 #define P_JUMP_L_MAX 0xE2FF
79 /* conditional jump pcrel11m2, 16-bit, min */
80 #define P_IF_CC_JUMP_MIN 0x1800
81 /* conditional jump pcrel11m2, 16-bit, max */
82 #define P_IF_CC_JUMP_MAX 0x1BFF
83 /* conditional jump(bp) pcrel11m2, 16-bit, min */
84 #define P_IF_CC_JUMP_BP_MIN 0x1C00
85 /* conditional jump(bp) pcrel11m2, 16-bit, max */
86 #define P_IF_CC_JUMP_BP_MAX 0x1FFF
87 /* conditional !jump pcrel11m2, 16-bit, min */
88 #define P_IF_NOT_CC_JUMP_MIN 0x1000
89 /* conditional !jump pcrel11m2, 16-bit, max */
90 #define P_IF_NOT_CC_JUMP_MAX 0x13FF
91 /* conditional jump(bp) pcrel11m2, 16-bit, min */
92 #define P_IF_NOT_CC_JUMP_BP_MIN 0x1400
93 /* conditional jump(bp) pcrel11m2, 16-bit, max */
94 #define P_IF_NOT_CC_JUMP_BP_MAX 0x17FF
95 /* call (preg), 16-bit, min */
96 #define P_CALL_PREG_MIN 0x0060
97 /* call (preg), 16-bit, max */
98 #define P_CALL_PREG_MAX 0x0067
99 /* call (pc+preg), 16-bit, min */
100 #define P_CALL_PC_PLUS_PREG_MIN 0x0070
101 /* call (pc+preg), 16-bit, max */
102 #define P_CALL_PC_PLUS_PREG_MAX 0x0077
103 /* call pcrel25m2, 32-bit, min */
104 #define P_CALL_MIN 0xE300
105 /* call pcrel25m2, 32-bit, max */
106 #define P_CALL_MAX 0xE3FF
107 /* RTS */
108 #define P_RTS 0x0010
109 /* MNOP */
110 #define P_MNOP 0xC803
111 /* EXCPT, 16-bit, min */
112 #define P_EXCPT_MIN 0x00A0
113 /* EXCPT, 16-bit, max */
114 #define P_EXCPT_MAX 0x00AF
115 /* multi instruction mask 1, 16-bit */
116 #define P_BIT_MULTI_INS_1 0xC000
117 /* multi instruction mask 2, 16-bit */
118 #define P_BIT_MULTI_INS_2 0x0800
119
120 /* The maximum bytes we search to skip the prologue. */
121 #define UPPER_LIMIT 40
122
123 /* ASTAT bits */
124 #define ASTAT_CC_POS 5
125 #define ASTAT_CC (1 << ASTAT_CC_POS)
126
127 /* Initial value: Register names used in BFIN's ISA documentation. */
128
129 static const char * const bfin_register_name_strings[] =
130 {
131 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
132 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
133 "i0", "i1", "i2", "i3", "m0", "m1", "m2", "m3",
134 "b0", "b1", "b2", "b3", "l0", "l1", "l2", "l3",
135 "a0x", "a0w", "a1x", "a1w", "astat", "rets",
136 "lc0", "lt0", "lb0", "lc1", "lt1", "lb1", "cycles", "cycles2",
137 "usp", "seqstat", "syscfg", "reti", "retx", "retn", "rete",
138 "pc", "cc",
139 };
140
141 #define NUM_BFIN_REGNAMES ARRAY_SIZE (bfin_register_name_strings)
142
143
144 /* In this diagram successive memory locations increase downwards or the
145 stack grows upwards with negative indices. (PUSH analogy for stack.)
146
147 The top frame is the "frame" of the current function being executed.
148
149 +--------------+ SP -
150 | local vars | ^
151 +--------------+ |
152 | save regs | |
153 +--------------+ FP |
154 | old FP -|-- top
155 +--------------+ | frame
156 | RETS | | |
157 +--------------+ | |
158 | param 1 | | |
159 | param 2 | | |
160 | ... | | V
161 +--------------+ | -
162 | local vars | | ^
163 +--------------+ | |
164 | save regs | | |
165 +--------------+<- |
166 | old FP -|-- next
167 +--------------+ | frame
168 | RETS | | |
169 +--------------+ | |
170 | param 1 | | |
171 | param 2 | | |
172 | ... | | V
173 +--------------+ | -
174 | local vars | | ^
175 +--------------+ | |
176 | save regs | | |
177 +--------------+<- next frame
178 | old FP | |
179 +--------------+ |
180 | RETS | V
181 +--------------+ -
182
183 The frame chain is formed as following:
184
185 FP has the topmost frame.
186 FP + 4 has the previous FP and so on. */
187
188
189 /* Map from DWARF2 register number to GDB register number. */
190
191 static const int map_gcc_gdb[] =
192 {
193 BFIN_R0_REGNUM,
194 BFIN_R1_REGNUM,
195 BFIN_R2_REGNUM,
196 BFIN_R3_REGNUM,
197 BFIN_R4_REGNUM,
198 BFIN_R5_REGNUM,
199 BFIN_R6_REGNUM,
200 BFIN_R7_REGNUM,
201 BFIN_P0_REGNUM,
202 BFIN_P1_REGNUM,
203 BFIN_P2_REGNUM,
204 BFIN_P3_REGNUM,
205 BFIN_P4_REGNUM,
206 BFIN_P5_REGNUM,
207 BFIN_SP_REGNUM,
208 BFIN_FP_REGNUM,
209 BFIN_I0_REGNUM,
210 BFIN_I1_REGNUM,
211 BFIN_I2_REGNUM,
212 BFIN_I3_REGNUM,
213 BFIN_B0_REGNUM,
214 BFIN_B1_REGNUM,
215 BFIN_B2_REGNUM,
216 BFIN_B3_REGNUM,
217 BFIN_L0_REGNUM,
218 BFIN_L1_REGNUM,
219 BFIN_L2_REGNUM,
220 BFIN_L3_REGNUM,
221 BFIN_M0_REGNUM,
222 BFIN_M1_REGNUM,
223 BFIN_M2_REGNUM,
224 BFIN_M3_REGNUM,
225 BFIN_A0_DOT_X_REGNUM,
226 BFIN_A1_DOT_X_REGNUM,
227 BFIN_CC_REGNUM,
228 BFIN_RETS_REGNUM,
229 BFIN_RETI_REGNUM,
230 BFIN_RETX_REGNUM,
231 BFIN_RETN_REGNUM,
232 BFIN_RETE_REGNUM,
233 BFIN_ASTAT_REGNUM,
234 BFIN_SEQSTAT_REGNUM,
235 BFIN_USP_REGNUM,
236 BFIN_LT0_REGNUM,
237 BFIN_LT1_REGNUM,
238 BFIN_LC0_REGNUM,
239 BFIN_LC1_REGNUM,
240 BFIN_LB0_REGNUM,
241 BFIN_LB1_REGNUM
242 };
243
244 /* Big enough to hold the size of the largest register in bytes. */
245 #define BFIN_MAX_REGISTER_SIZE 4
246
247 struct bfin_frame_cache
248 {
249 /* Base address. */
250 CORE_ADDR base;
251 CORE_ADDR sp_offset;
252 CORE_ADDR pc;
253 int frameless_pc_value;
254
255 /* Saved registers. */
256 CORE_ADDR saved_regs[BFIN_NUM_REGS];
257 CORE_ADDR saved_sp;
258
259 /* Stack space reserved for local variables. */
260 long locals;
261 };
262
263 /* Allocate and initialize a frame cache. */
264
265 static struct bfin_frame_cache *
bfin_alloc_frame_cache(void)266 bfin_alloc_frame_cache (void)
267 {
268 struct bfin_frame_cache *cache;
269 int i;
270
271 cache = FRAME_OBSTACK_ZALLOC (struct bfin_frame_cache);
272
273 /* Base address. */
274 cache->base = 0;
275 cache->sp_offset = -4;
276 cache->pc = 0;
277 cache->frameless_pc_value = 0;
278
279 /* Saved registers. We initialize these to -1 since zero is a valid
280 offset (that's where fp is supposed to be stored). */
281 for (i = 0; i < BFIN_NUM_REGS; i++)
282 cache->saved_regs[i] = -1;
283
284 /* Frameless until proven otherwise. */
285 cache->locals = -1;
286
287 return cache;
288 }
289
290 static struct bfin_frame_cache *
bfin_frame_cache(const frame_info_ptr & this_frame,void ** this_cache)291 bfin_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
292 {
293 struct bfin_frame_cache *cache;
294 int i;
295
296 if (*this_cache)
297 return (struct bfin_frame_cache *) *this_cache;
298
299 cache = bfin_alloc_frame_cache ();
300 *this_cache = cache;
301
302 cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
303 if (cache->base == 0)
304 return cache;
305
306 /* For normal frames, PC is stored at [FP + 4]. */
307 cache->saved_regs[BFIN_PC_REGNUM] = 4;
308 cache->saved_regs[BFIN_FP_REGNUM] = 0;
309
310 /* Adjust all the saved registers such that they contain addresses
311 instead of offsets. */
312 for (i = 0; i < BFIN_NUM_REGS; i++)
313 if (cache->saved_regs[i] != -1)
314 cache->saved_regs[i] += cache->base;
315
316 cache->pc = get_frame_func (this_frame) ;
317 if (cache->pc == 0 || cache->pc == get_frame_pc (this_frame))
318 {
319 /* Either there is no prologue (frameless function) or we are at
320 the start of a function. In short we do not have a frame.
321 PC is stored in rets register. FP points to previous frame. */
322
323 cache->saved_regs[BFIN_PC_REGNUM] =
324 get_frame_register_unsigned (this_frame, BFIN_RETS_REGNUM);
325 cache->frameless_pc_value = 1;
326 cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
327 cache->saved_regs[BFIN_FP_REGNUM] = cache->base;
328 cache->saved_sp = cache->base;
329 }
330 else
331 {
332 cache->frameless_pc_value = 0;
333
334 /* Now that we have the base address for the stack frame we can
335 calculate the value of SP in the calling frame. */
336 cache->saved_sp = cache->base + 8;
337 }
338
339 return cache;
340 }
341
342 static void
bfin_frame_this_id(const frame_info_ptr & this_frame,void ** this_cache,struct frame_id * this_id)343 bfin_frame_this_id (const frame_info_ptr &this_frame,
344 void **this_cache,
345 struct frame_id *this_id)
346 {
347 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
348
349 /* This marks the outermost frame. */
350 if (cache->base == 0)
351 return;
352
353 /* See the end of bfin_push_dummy_call. */
354 *this_id = frame_id_build (cache->base + 8, cache->pc);
355 }
356
357 static struct value *
bfin_frame_prev_register(const frame_info_ptr & this_frame,void ** this_cache,int regnum)358 bfin_frame_prev_register (const frame_info_ptr &this_frame,
359 void **this_cache,
360 int regnum)
361 {
362 struct gdbarch *gdbarch = get_frame_arch (this_frame);
363 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
364
365 if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
366 return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
367
368 if (regnum < BFIN_NUM_REGS && cache->saved_regs[regnum] != -1)
369 return frame_unwind_got_memory (this_frame, regnum,
370 cache->saved_regs[regnum]);
371
372 return frame_unwind_got_register (this_frame, regnum, regnum);
373 }
374
375 static const struct frame_unwind bfin_frame_unwind =
376 {
377 "bfin prologue",
378 NORMAL_FRAME,
379 default_frame_unwind_stop_reason,
380 bfin_frame_this_id,
381 bfin_frame_prev_register,
382 NULL,
383 default_frame_sniffer
384 };
385
386 /* Check for "[--SP] = <reg>;" insns. These are appear in function
387 prologues to save misc registers onto the stack. */
388
389 static int
is_minus_minus_sp(int op)390 is_minus_minus_sp (int op)
391 {
392 op &= 0xFFC0;
393
394 if ((op == P_MINUS_SP1) || (op == P_MINUS_SP2)
395 || (op == P_MINUS_SP3) || (op == P_MINUS_SP4))
396 return 1;
397
398 return 0;
399 }
400
401 /* Skip all the insns that appear in generated function prologues. */
402
403 static CORE_ADDR
bfin_skip_prologue(struct gdbarch * gdbarch,CORE_ADDR pc)404 bfin_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
405 {
406 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
407 int op = read_memory_unsigned_integer (pc, 2, byte_order);
408 CORE_ADDR orig_pc = pc;
409 int done = 0;
410
411 /* The new gcc prologue generates the register saves BEFORE the link
412 or RETS saving instruction.
413 So, our job is to stop either at those instructions or some upper
414 limit saying there is no frame! */
415
416 while (!done)
417 {
418 if (is_minus_minus_sp (op))
419 {
420 while (is_minus_minus_sp (op))
421 {
422 pc += 2;
423 op = read_memory_unsigned_integer (pc, 2, byte_order);
424 }
425
426 if (op == P_LINKAGE)
427 pc += 4;
428
429 done = 1;
430 }
431 else if (op == P_LINKAGE)
432 {
433 pc += 4;
434 done = 1;
435 }
436 else if (op == P_MINUS_MINUS_SP_EQ_RETS)
437 {
438 pc += 2;
439 done = 1;
440 }
441 else if (op == P_RTS)
442 {
443 done = 1;
444 }
445 else if ((op >= P_JUMP_PREG_MIN && op <= P_JUMP_PREG_MAX)
446 || (op >= P_JUMP_PC_PLUS_PREG_MIN
447 && op <= P_JUMP_PC_PLUS_PREG_MAX)
448 || (op == P_JUMP_S_MIN && op <= P_JUMP_S_MAX))
449 {
450 done = 1;
451 }
452 else if (pc - orig_pc >= UPPER_LIMIT)
453 {
454 warning (_("Function Prologue not recognised; "
455 "pc will point to ENTRY_POINT of the function"));
456 pc = orig_pc + 2;
457 done = 1;
458 }
459 else
460 {
461 pc += 2; /* Not a terminating instruction go on. */
462 op = read_memory_unsigned_integer (pc, 2, byte_order);
463 }
464 }
465
466 /* TODO:
467 Dwarf2 uses entry point value AFTER some register initializations.
468 We should perhaps skip such asssignments as well (R6 = R1, ...). */
469
470 return pc;
471 }
472
473 /* Return the GDB type object for the "standard" data type of data in
474 register N. This should be void pointer for P0-P5, SP, FP;
475 void pointer to function for PC; int otherwise. */
476
477 static struct type *
bfin_register_type(struct gdbarch * gdbarch,int regnum)478 bfin_register_type (struct gdbarch *gdbarch, int regnum)
479 {
480 if ((regnum >= BFIN_P0_REGNUM && regnum <= BFIN_FP_REGNUM)
481 || regnum == BFIN_USP_REGNUM)
482 return builtin_type (gdbarch)->builtin_data_ptr;
483
484 if (regnum == BFIN_PC_REGNUM || regnum == BFIN_RETS_REGNUM
485 || regnum == BFIN_RETI_REGNUM || regnum == BFIN_RETX_REGNUM
486 || regnum == BFIN_RETN_REGNUM || regnum == BFIN_RETE_REGNUM
487 || regnum == BFIN_LT0_REGNUM || regnum == BFIN_LB0_REGNUM
488 || regnum == BFIN_LT1_REGNUM || regnum == BFIN_LB1_REGNUM)
489 return builtin_type (gdbarch)->builtin_func_ptr;
490
491 return builtin_type (gdbarch)->builtin_int32;
492 }
493
494 static CORE_ADDR
bfin_push_dummy_call(struct gdbarch * gdbarch,struct value * function,struct regcache * regcache,CORE_ADDR bp_addr,int nargs,struct value ** args,CORE_ADDR sp,function_call_return_method return_method,CORE_ADDR struct_addr)495 bfin_push_dummy_call (struct gdbarch *gdbarch,
496 struct value *function,
497 struct regcache *regcache,
498 CORE_ADDR bp_addr,
499 int nargs,
500 struct value **args,
501 CORE_ADDR sp,
502 function_call_return_method return_method,
503 CORE_ADDR struct_addr)
504 {
505 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
506 int i;
507 long reg_r0, reg_r1, reg_r2;
508 int total_len = 0;
509
510 for (i = nargs - 1; i >= 0; i--)
511 {
512 struct type *value_type = args[i]->enclosing_type ();
513
514 total_len += align_up (value_type->length (), 4);
515 }
516
517 /* At least twelve bytes of stack space must be allocated for the function's
518 arguments, even for functions that have less than 12 bytes of argument
519 data. */
520
521 if (total_len < 12)
522 sp -= 12 - total_len;
523
524 /* Push arguments in reverse order. */
525
526 for (i = nargs - 1; i >= 0; i--)
527 {
528 struct type *value_type = args[i]->enclosing_type ();
529 struct type *arg_type = check_typedef (value_type);
530 int container_len = align_up (arg_type->length (), 4);
531
532 sp -= container_len;
533 write_memory (sp, args[i]->contents ().data (), container_len);
534 }
535
536 /* Initialize R0, R1, and R2 to the first 3 words of parameters. */
537
538 reg_r0 = read_memory_integer (sp, 4, byte_order);
539 regcache_cooked_write_unsigned (regcache, BFIN_R0_REGNUM, reg_r0);
540 reg_r1 = read_memory_integer (sp + 4, 4, byte_order);
541 regcache_cooked_write_unsigned (regcache, BFIN_R1_REGNUM, reg_r1);
542 reg_r2 = read_memory_integer (sp + 8, 4, byte_order);
543 regcache_cooked_write_unsigned (regcache, BFIN_R2_REGNUM, reg_r2);
544
545 /* Store struct value address. */
546
547 if (return_method == return_method_struct)
548 regcache_cooked_write_unsigned (regcache, BFIN_P0_REGNUM, struct_addr);
549
550 /* Set the dummy return value to bp_addr.
551 A dummy breakpoint will be setup to execute the call. */
552
553 regcache_cooked_write_unsigned (regcache, BFIN_RETS_REGNUM, bp_addr);
554
555 /* Finally, update the stack pointer. */
556
557 regcache_cooked_write_unsigned (regcache, BFIN_SP_REGNUM, sp);
558
559 return sp;
560 }
561
562 /* Convert DWARF2 register number REG to the appropriate register number
563 used by GDB. */
564
565 static int
bfin_reg_to_regnum(struct gdbarch * gdbarch,int reg)566 bfin_reg_to_regnum (struct gdbarch *gdbarch, int reg)
567 {
568 if (reg < 0 || reg >= ARRAY_SIZE (map_gcc_gdb))
569 return -1;
570
571 return map_gcc_gdb[reg];
572 }
573
574 /* Implement the breakpoint_kind_from_pc gdbarch method. */
575
576 static int
bfin_breakpoint_kind_from_pc(struct gdbarch * gdbarch,CORE_ADDR * pcptr)577 bfin_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
578 {
579 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
580 unsigned short iw;
581
582 iw = read_memory_unsigned_integer (*pcptr, 2, byte_order);
583
584 if ((iw & 0xf000) >= 0xc000)
585 /* 32-bit instruction. */
586 return 4;
587 else
588 return 2;
589 }
590
591 /* Implement the sw_breakpoint_from_kind gdbarch method. */
592
593 static const gdb_byte *
bfin_sw_breakpoint_from_kind(struct gdbarch * gdbarch,int kind,int * size)594 bfin_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
595 {
596 static unsigned char bfin_breakpoint[] = {0xa1, 0x00, 0x00, 0x00};
597 static unsigned char bfin_sim_breakpoint[] = {0x25, 0x00, 0x00, 0x00};
598
599 *size = kind;
600
601 if (strcmp (target_shortname (), "sim") == 0)
602 return bfin_sim_breakpoint;
603 else
604 return bfin_breakpoint;
605 }
606
607 static void
bfin_extract_return_value(struct type * type,struct regcache * regs,gdb_byte * dst)608 bfin_extract_return_value (struct type *type,
609 struct regcache *regs,
610 gdb_byte *dst)
611 {
612 struct gdbarch *gdbarch = regs->arch ();
613 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
614 bfd_byte *valbuf = dst;
615 int len = type->length ();
616 ULONGEST tmp;
617 int regno = BFIN_R0_REGNUM;
618
619 gdb_assert (len <= 8);
620
621 while (len > 0)
622 {
623 regcache_cooked_read_unsigned (regs, regno++, &tmp);
624 store_unsigned_integer (valbuf, (len > 4 ? 4 : len), byte_order, tmp);
625 len -= 4;
626 valbuf += 4;
627 }
628 }
629
630 /* Write into appropriate registers a function return value of type
631 TYPE, given in virtual format. */
632
633 static void
bfin_store_return_value(struct type * type,struct regcache * regs,const gdb_byte * src)634 bfin_store_return_value (struct type *type,
635 struct regcache *regs,
636 const gdb_byte *src)
637 {
638 const bfd_byte *valbuf = src;
639
640 /* Integral values greater than one word are stored in consecutive
641 registers starting with R0. This will always be a multiple of
642 the register size. */
643
644 int len = type->length ();
645 int regno = BFIN_R0_REGNUM;
646
647 gdb_assert (len <= 8);
648
649 while (len > 0)
650 {
651 regs->cooked_write (regno++, valbuf);
652 len -= 4;
653 valbuf += 4;
654 }
655 }
656
657 /* Determine, for architecture GDBARCH, how a return value of TYPE
658 should be returned. If it is supposed to be returned in registers,
659 and READBUF is nonzero, read the appropriate value from REGCACHE,
660 and copy it into READBUF. If WRITEBUF is nonzero, write the value
661 from WRITEBUF into REGCACHE. */
662
663 static enum return_value_convention
bfin_return_value(struct gdbarch * gdbarch,struct value * function,struct type * type,struct regcache * regcache,gdb_byte * readbuf,const gdb_byte * writebuf)664 bfin_return_value (struct gdbarch *gdbarch,
665 struct value *function,
666 struct type *type,
667 struct regcache *regcache,
668 gdb_byte *readbuf,
669 const gdb_byte *writebuf)
670 {
671 if (type->length () > 8)
672 return RETURN_VALUE_STRUCT_CONVENTION;
673
674 if (readbuf)
675 bfin_extract_return_value (type, regcache, readbuf);
676
677 if (writebuf)
678 bfin_store_return_value (type, regcache, writebuf);
679
680 return RETURN_VALUE_REGISTER_CONVENTION;
681 }
682
683 /* Return the BFIN register name corresponding to register I. */
684
685 static const char *
bfin_register_name(struct gdbarch * gdbarch,int i)686 bfin_register_name (struct gdbarch *gdbarch, int i)
687 {
688 return bfin_register_name_strings[i];
689 }
690
691 static enum register_status
bfin_pseudo_register_read(struct gdbarch * gdbarch,readable_regcache * regcache,int regnum,gdb_byte * buffer)692 bfin_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
693 int regnum, gdb_byte *buffer)
694 {
695 gdb_byte buf[BFIN_MAX_REGISTER_SIZE];
696 enum register_status status;
697
698 if (regnum != BFIN_CC_REGNUM)
699 internal_error (_("invalid register number %d"), regnum);
700
701 /* Extract the CC bit from the ASTAT register. */
702 status = regcache->raw_read (BFIN_ASTAT_REGNUM, buf);
703 if (status == REG_VALID)
704 {
705 buffer[1] = buffer[2] = buffer[3] = 0;
706 buffer[0] = !!(buf[0] & ASTAT_CC);
707 }
708 return status;
709 }
710
711 static void
bfin_pseudo_register_write(struct gdbarch * gdbarch,struct regcache * regcache,int regnum,const gdb_byte * buffer)712 bfin_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
713 int regnum, const gdb_byte *buffer)
714 {
715 gdb_byte buf[BFIN_MAX_REGISTER_SIZE];
716
717 if (regnum != BFIN_CC_REGNUM)
718 internal_error (_("invalid register number %d"), regnum);
719
720 /* Overlay the CC bit in the ASTAT register. */
721 regcache->raw_read (BFIN_ASTAT_REGNUM, buf);
722 buf[0] = (buf[0] & ~ASTAT_CC) | ((buffer[0] & 1) << ASTAT_CC_POS);
723 regcache->raw_write (BFIN_ASTAT_REGNUM, buf);
724 }
725
726 static CORE_ADDR
bfin_frame_base_address(const frame_info_ptr & this_frame,void ** this_cache)727 bfin_frame_base_address (const frame_info_ptr &this_frame, void **this_cache)
728 {
729 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
730
731 return cache->base;
732 }
733
734 static CORE_ADDR
bfin_frame_local_address(const frame_info_ptr & this_frame,void ** this_cache)735 bfin_frame_local_address (const frame_info_ptr &this_frame, void **this_cache)
736 {
737 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
738
739 return cache->base - 4;
740 }
741
742 static CORE_ADDR
bfin_frame_args_address(const frame_info_ptr & this_frame,void ** this_cache)743 bfin_frame_args_address (const frame_info_ptr &this_frame, void **this_cache)
744 {
745 struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
746
747 return cache->base + 8;
748 }
749
750 static const struct frame_base bfin_frame_base =
751 {
752 &bfin_frame_unwind,
753 bfin_frame_base_address,
754 bfin_frame_local_address,
755 bfin_frame_args_address
756 };
757
758 static CORE_ADDR
bfin_frame_align(struct gdbarch * gdbarch,CORE_ADDR address)759 bfin_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
760 {
761 return align_down (address, 4);
762 }
763
764 enum bfin_abi
bfin_abi(struct gdbarch * gdbarch)765 bfin_abi (struct gdbarch *gdbarch)
766 {
767 bfin_gdbarch_tdep *tdep = gdbarch_tdep<bfin_gdbarch_tdep> (gdbarch);
768 return tdep->bfin_abi;
769 }
770
771 /* Initialize the current architecture based on INFO. If possible,
772 re-use an architecture from ARCHES, which is a list of
773 architectures already created during this debugging session.
774
775 Called e.g. at program startup, when reading a core file, and when
776 reading a binary file. */
777
778 static struct gdbarch *
bfin_gdbarch_init(struct gdbarch_info info,struct gdbarch_list * arches)779 bfin_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
780 {
781 enum bfin_abi abi;
782
783 abi = BFIN_ABI_FLAT;
784
785 /* If there is already a candidate, use it. */
786
787 for (arches = gdbarch_list_lookup_by_info (arches, &info);
788 arches != NULL;
789 arches = gdbarch_list_lookup_by_info (arches->next, &info))
790 {
791 bfin_gdbarch_tdep *tdep
792 = gdbarch_tdep<bfin_gdbarch_tdep> (arches->gdbarch);
793
794 if (tdep->bfin_abi != abi)
795 continue;
796
797 return arches->gdbarch;
798 }
799
800 gdbarch *gdbarch
801 = gdbarch_alloc (&info, gdbarch_tdep_up (new bfin_gdbarch_tdep));
802 bfin_gdbarch_tdep *tdep = gdbarch_tdep<bfin_gdbarch_tdep> (gdbarch);
803
804 tdep->bfin_abi = abi;
805
806 set_gdbarch_num_regs (gdbarch, BFIN_NUM_REGS);
807 set_gdbarch_pseudo_register_read (gdbarch, bfin_pseudo_register_read);
808 set_gdbarch_deprecated_pseudo_register_write (gdbarch,
809 bfin_pseudo_register_write);
810 set_gdbarch_num_pseudo_regs (gdbarch, BFIN_NUM_PSEUDO_REGS);
811 set_gdbarch_sp_regnum (gdbarch, BFIN_SP_REGNUM);
812 set_gdbarch_pc_regnum (gdbarch, BFIN_PC_REGNUM);
813 set_gdbarch_ps_regnum (gdbarch, BFIN_ASTAT_REGNUM);
814 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, bfin_reg_to_regnum);
815 set_gdbarch_register_name (gdbarch, bfin_register_name);
816 set_gdbarch_register_type (gdbarch, bfin_register_type);
817 set_gdbarch_push_dummy_call (gdbarch, bfin_push_dummy_call);
818 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
819 set_gdbarch_return_value (gdbarch, bfin_return_value);
820 set_gdbarch_skip_prologue (gdbarch, bfin_skip_prologue);
821 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
822 set_gdbarch_breakpoint_kind_from_pc (gdbarch, bfin_breakpoint_kind_from_pc);
823 set_gdbarch_sw_breakpoint_from_kind (gdbarch, bfin_sw_breakpoint_from_kind);
824 set_gdbarch_decr_pc_after_break (gdbarch, 2);
825 set_gdbarch_frame_args_skip (gdbarch, 8);
826 set_gdbarch_frame_align (gdbarch, bfin_frame_align);
827
828 /* Hook in ABI-specific overrides, if they have been registered. */
829 gdbarch_init_osabi (info, gdbarch);
830
831 dwarf2_append_unwinders (gdbarch);
832
833 frame_base_set_default (gdbarch, &bfin_frame_base);
834
835 frame_unwind_append_unwinder (gdbarch, &bfin_frame_unwind);
836
837 return gdbarch;
838 }
839
840 void _initialize_bfin_tdep ();
841 void
_initialize_bfin_tdep()842 _initialize_bfin_tdep ()
843 {
844 gdbarch_register (bfd_arch_bfin, bfin_gdbarch_init);
845 }
846