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Searched refs:PSL_CE (Results 1 – 6 of 6) sorted by relevance

/netbsd/src/sys/arch/powerpc/include/
Dpsl.h52 #define PSL_CE PSL_TGPR /* B4.. critical interrupt enable */ macro
114 #define PSL_USERSET (PSL_EE | PSL_PR | PSL_IS | PSL_DS | PSL_ME | PSL_CE)
115 #define PSL_USERMASK (PSL_SPV | PSL_CE | 0xFFFF)
/netbsd/src/sys/arch/powerpc/booke/
Dtrap.c752 if ((mfmsr() & PSL_CE) == 0) { in trap()
862 if ((mfmsr() & PSL_CE) == 0) { in trap()
898 if ((mfmsr() & PSL_CE) == 0) { in trap()
902 mtmsr(mfmsr()|PSL_CE); in trap()
943 if ((mfmsr() & PSL_CE) == 0) { in trap()
Dtrap_subr.S229 oris %r31,%r31,PSL_CE@h; \
445 # andis. %r0, %r31, PSL_CE@h
478 # andis. %r0, %r5, PSL_CE@h
De500_intr.c556 KASSERT(wdog_barked || (mfmsr() & PSL_CE)); in e500_splx()
595 KASSERT(wdog_barked || (mfmsr() & PSL_CE)); in e500_splraise()
943 KASSERT(wdog_barked || (mfmsr() & PSL_CE)); in e500_extintr()
/netbsd/src/sys/arch/powerpc/powerpc/
Dlocore_subr.S176 andis. %r0,%r0,PSL_CE@h
549 andis. %r0,%r31,PSL_CE@h
/netbsd/src/sys/arch/evbppc/mpc85xx/
Dmachdep.c997 mtmsr(mfmsr() | PSL_CE | PSL_ME | PSL_DE); in e500_cpu_hatch()
1076 msr = (msr & ~(PSL_EE|PSL_CE|PSL_ME)) | PSL_WE; in e500_ipi_halt()
1256 mtmsr(mfmsr() | PSL_CE | PSL_ME | PSL_DE); in initppc()