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Searched refs:PCI_BAR (Results 1 – 25 of 38) sorted by relevance

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/netbsd/src/sys/arch/sparc/sparc/
Dpci_fixup.c166 saved = pci_conf_read(NULL, tag, PCI_BAR(i)); in mspcic_pci_scan()
167 pci_conf_write(NULL, tag, PCI_BAR(i), (pcireg_t) ~0x0); in mspcic_pci_scan()
168 val = pci_conf_read(NULL, tag, PCI_BAR(i)); in mspcic_pci_scan()
169 pci_conf_write(NULL, tag, PCI_BAR(i), saved); in mspcic_pci_scan()
175 PCI_BAR(i), saved, val); in mspcic_pci_scan()
394 pci_conf_write(NULL, tag, PCI_BAR(j), in mspcic_pci_fixup()
396 val = pci_conf_read(NULL, tag, PCI_BAR(j)); in mspcic_pci_fixup()
405 pci_conf_write(NULL, tag, PCI_BAR(j), in mspcic_pci_fixup()
409 "mask %08x (io)\n", PCI_BAR(j), in mspcic_pci_fixup()
423 pci_conf_write(NULL, tag, PCI_BAR(j), in mspcic_pci_fixup()
[all …]
/netbsd/src/sys/external/bsd/drm2/pci/
Ddrmfb_pci.c85 for (i = 0; PCI_BAR(i) <= PCI_MAPREG_ROM; i++) { in drmfb_pci_mmap()
92 if (!pci_mapreg_probe(pa->pa_pc, pa->pa_tag, PCI_BAR(i), in drmfb_pci_mmap()
97 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, PCI_BAR(i), type, in drmfb_pci_mmap()
Ddrm_pci.c95 const int reg = PCI_BAR(unit); in drm_pci_attach()
/netbsd/src/sys/dev/pci/
Dif_wi_pci.c69 #define WI_PCI_CBMA PCI_BAR(0) /* Configuration Base Memory Address */
71 #define WI_PCI_PLX_LOIO PCI_BAR(1) /* PLX chip iobase */
72 #define WI_PCI_LOMEM PCI_BAR(2) /* ISA membase */
73 #define WI_PCI_LOIO PCI_BAR(3) /* ISA iobase */
Dif_mtd_pci.c57 #define PCI_IO_MAP_REG PCI_BAR(0)
58 #define PCI_MEM_MAP_REG PCI_BAR(1)
Dif_epic_pci.c70 #define EPIC_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
71 #define EPIC_PCI_MMBA PCI_BAR(1) /* memory mapped base */
Dif_atw_pci.c77 #define ATW_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
78 #define ATW_PCI_MMBA PCI_BAR(1) /* memory mapped base */
Dif_rtw_pci.c104 #define RTW_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
105 #define RTW_PCI_MMBA PCI_BAR(1) /* memory mapped base */
Dcx23885reg.h34 #define CX23885_MMBASE PCI_BAR(0)
Dif_ex_pci.c84 #define PCI_CBIO PCI_BAR(0) /* Configuration Base IO Address */
86 #define PCI_FUNCMEM PCI_BAR(2)
Dpuc.c188 bar = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BAR(i)); in puc_attach()
206 PCI_BAR(i), type, 0, in puc_attach()
Dpci_resource.c769 PCI_BAR(pi->pi_bar), 0); in pci_resource_init_device()
1052 PCI_BAR(pi->pi_bar), in pci_resource_alloc_device()
1057 PCI_BAR(pi->pi_bar)); in pci_resource_alloc_device()
1061 PCI_BAR(pi->pi_bar), base); in pci_resource_alloc_device()
1066 PCI_BAR(pi->pi_bar + 1), base); in pci_resource_alloc_device()
Dif_ep_pci.c98 #define PCI_CBIO PCI_BAR(0) /* Configuration Base IO Address */
Dif_an_pci.c72 #define AN_PCI_IOBA PCI_BAR(2) /* i/o base */
Dif_enavar.h68 #define ENA_REG_BAR PCI_BAR(0)
69 #define ENA_MEM_BAR PCI_BAR(2)
Dif_ntwoc_pci.c99 #define PCI_CBMA_ASIC PCI_BAR(0) /* Configuration Base Memory Address */
100 #define PCI_CBMA_SCA PCI_BAR(2)
Dif_ne_pci.c154 #define PCI_CBIO PCI_BAR(0) /* Configuration Base IO Address */
Dif_ral_pci.c95 #define RAL_PCI_BAR0 PCI_BAR(0)
Dif_bwi_pci.c56 #define BWI_PCI_BAR0 PCI_BAR(0)
Dif_ath_pci.c91 #define ATH_PCI_MMBA PCI_BAR(0) /* memory mapped base */
/netbsd/src/sys/arch/x86/pci/
Dpci_ranges.c351 basebar = pci_conf_read(pc, tag, PCI_BAR(bar)); in io_range_infer()
352 pci_conf_write(pc, tag, PCI_BAR(bar), 0xffffffff); in io_range_infer()
353 sizebar = pci_conf_read(pc, tag, PCI_BAR(bar)); in io_range_infer()
354 pci_conf_write(pc, tag, PCI_BAR(bar), basebar); in io_range_infer()
362 PCI_BAR(bar), basebar, sizebar); in io_range_infer()
674 basebar = pci_conf_read(pc, tag, PCI_BAR(bar)); in mmio_range_infer()
675 pci_conf_write(pc, tag, PCI_BAR(bar), 0xffffffff); in mmio_range_infer()
676 sizebar = pci_conf_read(pc, tag, PCI_BAR(bar)); in mmio_range_infer()
677 pci_conf_write(pc, tag, PCI_BAR(bar), basebar); in mmio_range_infer()
685 PCI_BAR(bar), basebar, sizebar); in mmio_range_infer()
/netbsd/src/sys/dev/cardbus/
Dif_atw_cardbus.c87 #define ATW_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
88 #define ATW_PCI_MMBA PCI_BAR(1) /* memory mapped base */
Dif_rtw_cardbus.c107 #define RTW_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
108 #define RTW_PCI_MMBA PCI_BAR(1) /* memory mapped base */
Dif_tlp_cardbus.c84 #define TULIP_PCI_IOBA PCI_BAR(0) /* i/o mapped base */
85 #define TULIP_PCI_MMBA PCI_BAR(1) /* memory mapped base */
Dif_ath_cardbus.c83 #define ATH_PCI_MMBA PCI_BAR(0) /* memory mapped base */

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