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Searched refs:P0LR (Results 1 – 6 of 6) sorted by relevance

/netbsd/src/sys/arch/vax/include/
Dcpu.h163 pcb->P0LR = (pcb->P0LR & ~AST_MASK) | AST_ON; \
206 pcb->P0LR = (pcb->P0LR & ~AST_MASK) | AST_ON; \
220 pcb->P0LR = (pcb->P0LR & ~AST_MASK) | AST_ON; \
Dpcb.h49 long P0LR; /* Page 0 Length Register */ member
/netbsd/src/sys/arch/vax/vax/
Dsubr.S130 clrl P0LR(%r0)
326 movl P0LR(%r4),%r0 /* LR and ASTLVL field, current PCB */
327 movl P0LR(%r3),%r1 /* same, pinned LWP */
331 insv %r0,$24,$3,P0LR(%r3) /* copy to pinned LWP */
332 insv $4,$24,$3,P0LR(%r4) /* reset AST for current LWP */
Dtrap.c317 pcb->P0LR = (pcb->P0LR & ~AST_MASK) | AST_PCB; in trap()
Dgenassym.cf58 define P0LR offsetof(struct pcb, P0LR)
Dpmap.c394 pcb->P0LR = pmap->pm_p0lr|AST_PCB; in pmap_bootstrap()
401 mtpr(pcb->P0LR, PR_P0LR); in pmap_bootstrap()
566 pcb->P0LR = pm->pm_p0lr | (pcb->P0LR & AST_MASK); in update_pcbs()
1622 pcb->P0LR = pmap->pm_p0lr|AST_PCB; in pmap_activate()