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Searched refs:OPC (Results 1 – 25 of 29) sorted by relevance

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/netbsd/src/external/gpl3/binutils/dist/opcodes/
Ddlx-dis.c36 #define OPC(x) ((x >> 26) & 0x3F) macro
106 unsigned char r_opc[] = { OPC(ALUOP) }; /* Fix ME */ in dlx_r_type()
193 { OPC(LHIOP), "lhi" }, /* Load HI to register. */ in dlx_load_type()
194 { OPC(LBOP), "lb" }, /* load byte sign extended. */ in dlx_load_type()
195 { OPC(LBUOP), "lbu" }, /* load byte unsigned. */ in dlx_load_type()
196 { OPC(LSBUOP),"ldstbu"}, /* load store byte unsigned. */ in dlx_load_type()
197 { OPC(LHOP), "lh" }, /* load halfword sign extended. */ in dlx_load_type()
198 { OPC(LHUOP), "lhu" }, /* load halfword unsigned. */ in dlx_load_type()
199 { OPC(LSHUOP),"ldsthu"}, /* load store halfword unsigned. */ in dlx_load_type()
200 { OPC(LWOP), "lw" }, /* load word. */ in dlx_load_type()
[all …]
Dcr16-opc.c29 #define ARITH_BYTE_INST(NAME, OPC, OP1) \ argument
31 {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{uimm4_1,20}, {regr,16}}}, \
33 {NAME, 2, (OPC<<4)+0xB, 20, ARITH_BYTE_INS, {{OP1,0}, {regr,16}}}, \
35 {NAME, 1, OPC+0x1, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
38 #define ARITH1_BYTE_INST(NAME, OPC, OP1) \ argument
40 {NAME, 2, (OPC<<4)+0xB, 20, ARITH_BYTE_INS, {{OP1,0}, {regr,16}}}
79 #define ARITH_BYTE_INST1(NAME, OPC) \ argument
81 {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
87 #define ARITH_BYTE_INST2(NAME, OPC) \ argument
89 {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{regr,20}, {regp,16}}}
[all …]
Dcrx-opc.c31 #define ARITH_BYTE_INST(NAME, OPC) \ argument
33 {NAME, 1, OPC, 24, ARITH_BYTE_INS | CST4MAP, {{cst4,20}, {regr,16}}}, \
35 {NAME, 2, (OPC<<4)+0xE, 20, ARITH_BYTE_INS | CST4MAP, {{i16,0}, {regr,16}}}, \
37 {NAME, 1, OPC+0x40, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
64 #define ARITH_INST(NAME, OPC) \ argument
66 {NAME, 1, OPC, 24, ARITH_INS | CST4MAP, {{cst4,20}, {regr,16}}}, \
68 {NAME, 2, (OPC<<4)+0xE, 20, ARITH_INS | CST4MAP, {{i16,0}, {regr,16}}}, \
70 {NAME, 3, (OPC<<4)+0xF, 20, ARITH_INS, {{i32,0}, {regr,16}}}, \
72 {NAME, 1, OPC+0x40, 24, ARITH_INS, {{regr,20}, {regr,16}}}
108 #define BRANCH_INST(NAME, OPC) \ argument
[all …]
Dcgen.sh107 -OPC ${opcfile} \
186 -OPC ${opcfile} \
/netbsd/src/external/gpl3/gdb/dist/opcodes/
Ddlx-dis.c36 #define OPC(x) ((x >> 26) & 0x3F) macro
106 unsigned char r_opc[] = { OPC(ALUOP) }; /* Fix ME */ in dlx_r_type()
193 { OPC(LHIOP), "lhi" }, /* Load HI to register. */ in dlx_load_type()
194 { OPC(LBOP), "lb" }, /* load byte sign extended. */ in dlx_load_type()
195 { OPC(LBUOP), "lbu" }, /* load byte unsigned. */ in dlx_load_type()
196 { OPC(LSBUOP),"ldstbu"}, /* load store byte unsigned. */ in dlx_load_type()
197 { OPC(LHOP), "lh" }, /* load halfword sign extended. */ in dlx_load_type()
198 { OPC(LHUOP), "lhu" }, /* load halfword unsigned. */ in dlx_load_type()
199 { OPC(LSHUOP),"ldsthu"}, /* load store halfword unsigned. */ in dlx_load_type()
200 { OPC(LWOP), "lw" }, /* load word. */ in dlx_load_type()
[all …]
Dcr16-opc.c29 #define ARITH_BYTE_INST(NAME, OPC, OP1) \ argument
31 {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{uimm4_1,20}, {regr,16}}}, \
33 {NAME, 2, (OPC<<4)+0xB, 20, ARITH_BYTE_INS, {{OP1,0}, {regr,16}}}, \
35 {NAME, 1, OPC+0x1, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
38 #define ARITH1_BYTE_INST(NAME, OPC, OP1) \ argument
40 {NAME, 2, (OPC<<4)+0xB, 20, ARITH_BYTE_INS, {{OP1,0}, {regr,16}}}
79 #define ARITH_BYTE_INST1(NAME, OPC) \ argument
81 {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
87 #define ARITH_BYTE_INST2(NAME, OPC) \ argument
89 {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{regr,20}, {regp,16}}}
[all …]
Dcrx-opc.c31 #define ARITH_BYTE_INST(NAME, OPC) \ argument
33 {NAME, 1, OPC, 24, ARITH_BYTE_INS | CST4MAP, {{cst4,20}, {regr,16}}}, \
35 {NAME, 2, (OPC<<4)+0xE, 20, ARITH_BYTE_INS | CST4MAP, {{i16,0}, {regr,16}}}, \
37 {NAME, 1, OPC+0x40, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}}
64 #define ARITH_INST(NAME, OPC) \ argument
66 {NAME, 1, OPC, 24, ARITH_INS | CST4MAP, {{cst4,20}, {regr,16}}}, \
68 {NAME, 2, (OPC<<4)+0xE, 20, ARITH_INS | CST4MAP, {{i16,0}, {regr,16}}}, \
70 {NAME, 3, (OPC<<4)+0xF, 20, ARITH_INS, {{i32,0}, {regr,16}}}, \
72 {NAME, 1, OPC+0x40, 24, ARITH_INS, {{regr,20}, {regr,16}}}
108 #define BRANCH_INST(NAME, OPC) \ argument
[all …]
Dcgen.sh107 -OPC ${opcfile} \
186 -OPC ${opcfile} \
/netbsd/src/external/gpl3/binutils/dist/gas/config/
Drx-parse.y1345 #define OPC(x) { #x, x, IS_OPCODE } macro
1346 OPC(ABS),
1347 OPC(ADC),
1348 OPC(ADD),
1350 OPC(BCLR),
1351 OPC(BCND),
1352 OPC(BFMOV),
1353 OPC(BFMOVZ),
1354 OPC(BMCND),
1355 OPC(BNOT),
[all …]
Drl78-parse.y1260 #define OPC(x) { #x, x, IS_OPCODE } macro
1262 OPC(ADD),
1263 OPC(ADDC),
1264 OPC(ADDW),
1266 OPC(AND1),
1267 OPC(BC),
1268 OPC(BF),
1269 OPC(BH),
1270 OPC(BNC),
1271 OPC(BNH),
[all …]
Drx-parse.c4691 #define OPC(x) { #x, x, IS_OPCODE } macro
4692 OPC(ABS),
4693 OPC(ADC),
4694 OPC(ADD),
4696 OPC(BCLR),
4697 OPC(BCND),
4698 OPC(BFMOV),
4699 OPC(BFMOVZ),
4700 OPC(BMCND),
4701 OPC(BNOT),
[all …]
Drl78-parse.c4504 #define OPC(x) { #x, x, IS_OPCODE } macro
4506 OPC(ADD),
4507 OPC(ADDC),
4508 OPC(ADDW),
4510 OPC(AND1),
4511 OPC(BC),
4512 OPC(BF),
4513 OPC(BH),
4514 OPC(BNC),
4515 OPC(BNH),
[all …]
Dtc-arm.c14816 #define X(OPC,I,F,S) N_MNEM_##OPC argument
14823 #define X(OPC,I,F,S) { (I), (F), (S) } argument
/netbsd/src/external/gpl3/binutils/dist/include/opcode/
Dcrx.h397 #define BIN(OPC,SHIFT) (OPC << SHIFT) argument
Dcr16.h411 #define BIN(OPC,SHIFT) (OPC << SHIFT) argument
/netbsd/src/external/gpl3/gdb/dist/include/opcode/
Dcr16.h411 #define BIN(OPC,SHIFT) (OPC << SHIFT) argument
Dcrx.h397 #define BIN(OPC,SHIFT) (OPC << SHIFT) argument
/netbsd/src/external/gpl3/gdb/dist/bfd/
Dxtensa-isa.c643 #define CHECK_OPCODE(INTISA,OPC,ERRVAL) \ argument
645 if ((OPC) < 0 || (OPC) >= (INTISA)->num_opcodes) \
855 #define CHECK_OPERAND(INTISA,OPC,ICLASS,OPND,ERRVAL) \ argument
862 (INTISA)->opcodes[(OPC)].name, (ICLASS)->num_operands); \
1254 #define CHECK_STATE_OPERAND(INTISA,OPC,ICLASS,STOP,ERRVAL) \ argument
1261 (INTISA)->opcodes[(OPC)].name, (ICLASS)->num_stateOperands); \
1301 #define CHECK_INTERFACE_OPERAND(INTISA,OPC,ICLASS,IFOP,ERRVAL) \ argument
1308 (INTISA)->opcodes[(OPC)].name, \
/netbsd/src/external/gpl3/binutils/dist/bfd/
Dxtensa-isa.c643 #define CHECK_OPCODE(INTISA,OPC,ERRVAL) \ argument
645 if ((OPC) < 0 || (OPC) >= (INTISA)->num_opcodes) \
855 #define CHECK_OPERAND(INTISA,OPC,ICLASS,OPND,ERRVAL) \ argument
862 (INTISA)->opcodes[(OPC)].name, (ICLASS)->num_operands); \
1254 #define CHECK_STATE_OPERAND(INTISA,OPC,ICLASS,STOP,ERRVAL) \ argument
1261 (INTISA)->opcodes[(OPC)].name, (ICLASS)->num_stateOperands); \
1301 #define CHECK_INTERFACE_OPERAND(INTISA,OPC,ICLASS,IFOP,ERRVAL) \ argument
1308 (INTISA)->opcodes[(OPC)].name, \
/netbsd/src/crypto/external/bsd/openssl/dist/crypto/bio/
Dbss_log.c75 # define LOG_DAEMON OPC$M_NM_NTWORK
370 opcdef_p->opc$b_ms_type = OPC$_RQ_RQST; in xsyslog()
/netbsd/src/external/gpl3/gdb/dist/sim/common/
Dcgen.sh207 -OPC ${opcfile} \
/netbsd/src/external/bsd/libpcap/dist/
Dgrammar.y.in414 %token SIO OPC DPC SLS HSIO HOPC HDPC HSLS
920 | OPC { $$.mtp3fieldtype = M_OPC; }
Dscanner.l406 opc return OPC;
/netbsd/src/external/gpl3/binutils/dist/binutils/po/
Dca.po5900 " -P, --private=OPC,OPC... Mostra els continguts específics del format d'objecte\n"
6003 " -M, --disassembler-options=OPC Passa el text OPC cap al desassemblador\n"
Des.po6335 " -P, --private=OPC,OPC... Muestra contenidos específicos del formato objeto\n"
6438 " -M, --disassembler-options=OPC Pasa el texto OPC al desensamblador\n"

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