Home
last modified time | relevance | path

Searched refs:NO_REGS (Results 1 – 25 of 124) sorted by relevance

12345

/netbsd/src/external/gpl3/gcc/dist/gcc/config/xtensa/
Dconstraints.md26 (define_register_constraint "b" "TARGET_BOOLEANS ? BR_REGS : NO_REGS"
30 (define_register_constraint "d" "TARGET_DENSITY ? AR_REGS: NO_REGS"
35 (define_register_constraint "f" "TARGET_HARD_FLOAT ? FP_REGS : NO_REGS"
39 (define_register_constraint "q" "TARGET_WINDOWED_ABI ? SP_REG : NO_REGS"
43 (define_register_constraint "A" "TARGET_MAC16 ? ACC_REG : NO_REGS"
46 (define_register_constraint "B" "TARGET_SEXT ? GR_REGS : NO_REGS"
51 (define_register_constraint "C" "TARGET_MUL16 ? GR_REGS: NO_REGS"
56 …fine_register_constraint "D" "TARGET_DENSITY ? (TARGET_WINDOWED_ABI ? GR_REGS : AR_REGS) : NO_REGS"
61 (define_register_constraint "W" "TARGET_CONST16 ? GR_REGS: NO_REGS"
/netbsd/src/external/gpl3/gcc/dist/gcc/config/i386/
Dconstraints.md70 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FLOAT_REGS : NO_REGS"
74 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_TOP_REG : NO_REGS"
78 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS"
81 (define_register_constraint "Yk" "TARGET_AVX512F ? MASK_REGS : NO_REGS"
84 (define_register_constraint "k" "TARGET_AVX512F ? ALL_MASK_REGS : NO_REGS"
88 (define_register_constraint "y" "TARGET_MMX ? MMX_REGS : NO_REGS"
91 (define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS"
94 (define_register_constraint "v" "TARGET_SSE ? ALL_SSE_REGS : NO_REGS"
117 (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
121 "TARGET_AVX512DQ ? ALL_SSE_REGS : TARGET_SSE4_1 ? SSE_REGS : NO_REGS"
[all …]
/netbsd/src/external/gpl3/gcc/dist/gcc/
Dira-costs.cc427 reg_class_t secondary_class = NO_REGS; in copy_cost()
447 if (secondary_class != NO_REGS) in copy_cost()
458 if (MEM_P (x) || rclass == NO_REGS) in copy_cost()
567 classes[i] = NO_REGS; in record_reg_classes()
608 else if (classes[j] != NO_REGS) in record_reg_classes()
623 if (classes[j] == NO_REGS) in record_reg_classes()
654 if (op_class == NO_REGS) in record_reg_classes()
677 if (op_class == NO_REGS) in record_reg_classes()
699 if (op_class == NO_REGS) in record_reg_classes()
740 if (pref_class == NO_REGS) in record_reg_classes()
[all …]
Dira-lives.cc666 if (def_cl == NO_REGS) in check_and_make_def_conflict()
708 if (use_cl == NO_REGS) in check_and_make_def_conflict()
742 && alternative_class (op_alt1, def) != NO_REGS in check_and_make_def_conflict()
743 && alternative_class (op_alt1, use) != NO_REGS) in check_and_make_def_conflict()
793 if (def_cl != NO_REGS) in make_early_clobber_and_input_conflicts()
856 cl = NO_REGS; in single_reg_class()
868 return NO_REGS; in single_reg_class()
877 return NO_REGS; in single_reg_class()
882 return NO_REGS; in single_reg_class()
884 if (next_cl == NO_REGS) in single_reg_class()
[all …]
Dlra-constraints.cc182 if (rclass == NO_REGS) in get_try_hard_regno()
232 return NO_REGS; in get_reg_class()
258 *new_class = NO_REGS; in in_class_p()
285 || (rclass != NO_REGS && ira_class_subset_p[rclass][cl] in in_class_p()
320 return get_reg_class (regno) == NO_REGS; in in_mem_p()
1191 enum reg_class op_class = NO_REGS; in reg_class_from_constraints()
1207 if (cl == NO_REGS) in reg_class_from_constraints()
1229 return REG_P (op) ? get_reg_class (REGNO (op)) : NO_REGS; in get_op_class()
1283 sclass = dclass = NO_REGS; in check_and_process_move()
1286 gcc_assert (dclass < LIM_REG_CLASSES && dclass >= NO_REGS); in check_and_process_move()
[all …]
Dira.cc541 if (i == (int) NO_REGS) in setup_reg_subclasses()
573 ira_memory_move_cost[mode][NO_REGS][0] in setup_class_subset_and_memory_move_costs()
574 = ira_memory_move_cost[mode][NO_REGS][1] = SHRT_MAX; in setup_class_subset_and_memory_move_costs()
577 if (cl != (int) NO_REGS) in setup_class_subset_and_memory_move_costs()
591 if (ira_memory_move_cost[mode][NO_REGS][0] in setup_class_subset_and_memory_move_costs()
593 ira_max_memory_move_cost[mode][NO_REGS][0] in setup_class_subset_and_memory_move_costs()
594 = ira_memory_move_cost[mode][NO_REGS][0] in setup_class_subset_and_memory_move_costs()
596 if (ira_memory_move_cost[mode][NO_REGS][1] in setup_class_subset_and_memory_move_costs()
598 ira_max_memory_move_cost[mode][NO_REGS][1] in setup_class_subset_and_memory_move_costs()
599 = ira_memory_move_cost[mode][NO_REGS][1] in setup_class_subset_and_memory_move_costs()
[all …]
Dregrename.cc412 has_preferred_class = (preferred_class != NO_REGS); in find_rename_reg()
457 reg_class super_class = NO_REGS; in regrename_find_superclass()
628 chain = create_new_chain (i, iri->nregs, NULL, NULL, NO_REGS); in init_rename_info()
1171 if (cl == NO_REGS || (!exact_match && !DEBUG_INSN_P (insn))) in scan_rtx_reg()
1762 NO_REGS); in build_def_use()
1786 scan_rtx (insn, &PATTERN (insn), NO_REGS, mark_all_read, OP_IN); in build_def_use()
1792 NO_REGS, mark_all_read, OP_IN); in build_def_use()
1806 scan_rtx (insn, loc, NO_REGS, mark_all_read, OP_IN); in build_def_use()
1858 scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, in build_def_use()
1887 scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN); in build_def_use()
[all …]
Dreload.cc318 enum reg_class rclass = NO_REGS; in push_secondary_reload()
363 if (rclass == NO_REGS && icode == CODE_FOR_nothing) in push_secondary_reload()
366 if (rclass != NO_REGS) in push_secondary_reload()
389 gcc_assert (rclass == NO_REGS); in push_secondary_reload()
522 if (icode == CODE_FOR_nothing || rclass != NO_REGS) in secondary_reload_class()
548 gcc_assert (rclass != NO_REGS); in scratch_reload_class()
643 enum reg_class best_class = NO_REGS; in find_valid_class()
697 enum reg_class best_class = NO_REGS; in find_valid_class_1()
978 subreg_in_class = NO_REGS; in push_reload()
1107 || (secondary_reload_class (1, rclass, inmode, in) != NO_REGS in push_reload()
[all …]
Dtarghooks.cc1303 enum reg_class rclass = NO_REGS; in default_secondary_reload()
1309 return NO_REGS; in default_secondary_reload()
1321 if (rclass != NO_REGS) in default_secondary_reload()
1348 gcc_assert (insn_class != NO_REGS); in default_secondary_reload()
1367 rclass = NO_REGS; in default_secondary_reload()
1373 if (rclass == NO_REGS) in default_secondary_reload()
2099 return NO_REGS; in default_preferred_rename_class()
/netbsd/src/external/gpl3/gcc/dist/gcc/config/m32c/
Dconstraints.md29 (define_register_constraint "Rcr" "TARGET_A16 ? CR_REGS : NO_REGS"
32 (define_register_constraint "Rcl" "TARGET_A24 ? CR_REGS : NO_REGS"
74 (define_register_constraint "Raw" "TARGET_A16 ? A_REGS : NO_REGS"
77 (define_register_constraint "Ral" "TARGET_A24 ? A_REGS : NO_REGS"
101 (define_register_constraint "Rmm" "fixed_regs[MEM0_REGNO] ? NO_REGS : MEM_REGS"
Dm32c.h315 NO_REGS, enumerator
391 #define INDEX_REG_CLASS NO_REGS
/netbsd/src/external/gpl3/gcc/dist/gcc/config/h8300/
Dconstraints.md37 ;; However, there are cases where they should be NO_REGS:
39 ;; - 'd' should be NO_REGS when reloading a function that uses the
44 ;; always be in use. It's therefore better to map 'd' to NO_REGS
48 ;; - we would like 'D' to be NO_REGS when the frame pointer isn't
61 ? NO_REGS
63 ? NO_REGS
/netbsd/src/external/gpl3/gcc/dist/gcc/config/sparc/
Dconstraints.md27 (define_register_constraint "b" "(TARGET_V9 && TARGET_VIS ? EXTRA_FP_REGS : NO_REGS)"
33 (define_register_constraint "d" "(TARGET_V9 && TARGET_VIS ? FP_REGS : NO_REGS)"
38 (define_register_constraint "e" "(TARGET_FPU ? (TARGET_V9 ? EXTRA_FP_REGS : FP_REGS) : NO_REGS)"
41 (define_register_constraint "f" "(TARGET_FPU ? FP_REGS : NO_REGS)"
44 (define_register_constraint "h" "(TARGET_V9 && TARGET_V8PLUS ? I64_REGS : NO_REGS)"
184 ;; reg_class_for_constraint, and checks it against NO_REGS.
/netbsd/src/external/gpl3/gcc/dist/gcc/config/pa/
Dpa64-regs.h207 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, enumerator
238 ((REGNO) == 0 ? NO_REGS \
Dpa32-regs.h271 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, enumerator
302 ((REGNO) == 0 ? NO_REGS \
/netbsd/src/external/gpl3/gcc/dist/gcc/config/mn10300/
Dconstraints.md41 (define_register_constraint "x" "TARGET_AM33 ? EXTENDED_REGS : NO_REGS"
44 (define_register_constraint "f" "TARGET_AM33_2 ? FP_REGS : NO_REGS"
47 (define_register_constraint "c" "TARGET_AM33_2 ? FP_ACC_REGS : NO_REGS"
Dmn10300.h246 NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS, SP_OR_ADDRESS_REGS, enumerator
294 NO_REGS)
/netbsd/src/external/gpl3/gcc/dist/gcc/config/rs6000/
Dconstraints.md82 used; otherwise, @code{NO_REGS}.")
87 (define_register_constraint "wn" "NO_REGS"
88 "@internal No register (@code{NO_REGS}).")
92 @code{NO_REGS}.")
96 @code{NO_REGS}.")
100 @code{NO_REGS}.")
/netbsd/src/external/gpl3/gcc/dist/gcc/config/arm/
Dconstraints.md47 (define_register_constraint "Up" "TARGET_HAVE_MVE ? VPR_REG : NO_REGS"
62 (define_register_constraint "Uf" "TARGET_HAVE_MVE ? VFPCC_REG : NO_REGS"
65 (define_register_constraint "Te" "TARGET_HAVE_MVE ? EVEN_REG : NO_REGS"
105 (define_register_constraint "t" "TARGET_32BIT ? VFP_LO_REGS : NO_REGS"
109 "TARGET_32BIT ? (TARGET_VFPD32 ? VFP_REGS : VFP_LO_REGS) : NO_REGS"
112 (define_register_constraint "x" "TARGET_32BIT ? VFP_D0_D7_REGS : NO_REGS"
115 (define_register_constraint "y" "TARGET_REALLY_IWMMXT ? IWMMXT_REGS : NO_REGS"
119 "TARGET_REALLY_IWMMXT ? IWMMXT_GR_REGS : NO_REGS"
125 (define_register_constraint "h" "TARGET_THUMB ? HI_REGS : NO_REGS"
151 (define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS"
Darm.h1283 NO_REGS, enumerator
1420 (lra_in_progress ? NO_REGS \
1424 : NO_REGS)) \
1425 : NO_REGS))
1428 (lra_in_progress ? NO_REGS \
1432 : NO_REGS)) \
1433 : NO_REGS)
1446 ? GENERAL_REGS : NO_REGS) \
1464 ? GENERAL_REGS : NO_REGS) \
/netbsd/src/external/gpl3/gcc/dist/gcc/config/lm32/
Dlm32.h169 NO_REGS, enumerator
186 (G_REG_P(REGNO) ? GENERAL_REGS : NO_REGS)
188 #define INDEX_REG_CLASS NO_REGS
/netbsd/src/external/gpl3/gcc/dist/gcc/config/mcore/
Dmcore.h288 NO_REGS, enumerator
332 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER ? regno_reg_class[REGNO] : NO_REGS)
341 #define INDEX_REG_CLASS NO_REGS
/netbsd/src/external/gpl3/gcc/dist/gcc/config/moxie/
Dmoxie.h133 NO_REGS, enumerator
376 #define INDEX_REG_CLASS NO_REGS
/netbsd/src/external/gpl3/gcc/dist/gcc/config/v850/
Dv850.h314 NO_REGS, EVEN_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES enumerator
341 #define REGNO_REG_CLASS(REGNO) ((REGNO == CC_REGNUM || REGNO == FCC_REGNUM) ? NO_REGS : GENERAL_RE…
345 #define INDEX_REG_CLASS NO_REGS
/netbsd/src/external/gpl3/gcc/dist/gcc/config/iq2000/
Diq2000.h167 NO_REGS, /* No registers in set. */ enumerator
192 ((REGNO) <= GP_REG_LAST + 1 ? GR_REGS : NO_REGS)
196 #define INDEX_REG_CLASS NO_REGS

12345