Searched refs:NCR5380REGS_SZ (Results 1 – 2 of 2) sorted by relevance
79 #define NCR5380REGS_SZ 8 macro84 #define SIREG_DMA_ADDRH (NCR5380REGS_SZ + 0) /* DMA address, high word */85 #define SIREG_DMA_ADDRL (NCR5380REGS_SZ + 2) /* DMA address, low word */86 #define SIREG_DMA_CNTH (NCR5380REGS_SZ + 4) /* DMA count, high word */87 #define SIREG_DMA_CNTL (NCR5380REGS_SZ + 6) /* DMA count, low word */88 #define SIREG_UDC_DATA (NCR5380REGS_SZ + 8) /* UDC reg data */89 #define SIREG_UDC_ADDR (NCR5380REGS_SZ + 10) /* UDC reg addr */90 #define SIREG_FIFO_DATA (NCR5380REGS_SZ + 12) /* FIFO data */91 #define SIREG_FIFO_CNT (NCR5380REGS_SZ + 14) /* FIFO count, low word */92 #define SIREG_CSR (NCR5380REGS_SZ + 16) /* Control/status register */[all …]
68 #define NCR5380REGS_SZ 8 macro73 #define SWREG_DMA_ADDR (NCR5380REGS_SZ + 0)74 #define SWREG_DMA_CNT (NCR5380REGS_SZ + 4)75 #define SWREG_CSR (NCR5380REGS_SZ + 12)76 #define SWREG_BPR (NCR5380REGS_SZ + 16)77 #define SWREG_BANK_SZ (NCR5380REGS_SZ + 20)