Searched refs:MIPS_SR_KX (Results 1 – 10 of 10) sorted by relevance
| /netbsd/src/sys/arch/mips/mips/ |
| D | mips_fpu.c | 115 … : "r"(tf->tf_regs[_R_SR] & (MIPS_SR_COP_1_BIT|MIPS3_SR_FR|MIPS_SR_KX|MIPS_SR_INT_IE)), in mips_fpu_state_save()
246 …: "r"(tf->tf_regs[_R_SR] & (MIPS_SR_COP_1_BIT|MIPS3_SR_FR|MIPS_SR_KX|MIPS_SR_INT_IE)), "n"(MIPS_CO… in mips_fpu_state_load()
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| D | vm_machdep.c | 151 KASSERT(tf->tf_regs[_R_SR] & MIPS_SR_KX); in cpu_lwp_fork()
152 KASSERT(pcb2->pcb_context.val[_L_SR] & MIPS_SR_KX); in cpu_lwp_fork()
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| D | locore_mips3.S | 820 li v0, MIPS_SR_KX | MIPS_SR_UX # allow 64bit addressing
822 li v0, MIPS_SR_KX # allow 64bit kernel addressing
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| D | mips_machdep.c | 2150 pcb->pcb_context.val[_L_SR] |= MIPS_SR_KX; in mips_init_lwp0_uarea()
2151 l->l_md.md_utf->tf_regs[_R_SR] = MIPS_SR_KX; in mips_init_lwp0_uarea()
2154 pcb->pcb_context.val[_L_SR] |= MIPS_SR_KX | MIPS_SR_UX; in mips_init_lwp0_uarea()
2155 l->l_md.md_utf->tf_regs[_R_SR] = MIPS_SR_KX | MIPS_SR_UX; in mips_init_lwp0_uarea()
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| D | locore.S | 93 or k0, MIPS_SR_KX | MIPS_SR_UX
98 or k0, MIPS_SR_KX
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| D | mipsX_subr.S | 157 li reg, MIPS_SR_KX; mtc0 reg, MIPS_COP_0_STATUS
159 li reg, MIPS_SR_EXL | MIPS_SR_KX; mtc0 reg, MIPS_COP_0_STATUS
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| /netbsd/src/sys/arch/mips/include/ |
| D | psl.h | 51 # define MIPS3_PSL_XFLAGS (MIPS3_SR_XX | MIPS_SR_KX)
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| D | cpuregs.h | 306 #define MIPS_SR_KX MIPS3_SR_KX macro
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| /netbsd/src/sys/arch/sgimips/sgimips/ |
| D | cpu.c | 113 KASSERTMSG(mips_cp0_status_read() & MIPS_SR_KX, in cpu_intr()
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| /netbsd/src/sys/arch/mips/rmi/ |
| D | rmixl_subr.S | 139 li t0, MIPS_SR_KX
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