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/netbsd/src/external/gpl3/gdb/dist/gdb/testsuite/gdb.arch/
Driscv64-unwind-prologue-with-ld-lw-foo.s56 lla a5,__canary # Load the fake canary address.
57 lw t4,0(a5) # Load a 32 bit canary (use t4 to force the use of
59 ld t4,0(a5) # Load a 64 bit canary (use t4 to force the use of
61 c.lw a4,0(a5) # Load a 32 bit canary using the compressed insn.
62 c.ld a4,0(a5) # Load a 64 bit canary using the compressed insn.
/netbsd/src/external/bsd/elftosb/dist/test_files/
Dhello_NOR_arm.map6 Load Map Wed Dec 15 10:06:16 2004
17 Load Map Wed Dec 15 10:06:16 2004
26 Load Map Wed Dec 15 10:06:16 2004
Dhello_NOR_thumb.map6 Load Map Wed Dec 15 10:09:42 2004
17 Load Map Wed Dec 15 10:09:42 2004
26 Load Map Wed Dec 15 10:09:42 2004
Dhello_NOR_mixed.map6 Load Map Wed Dec 15 10:14:22 2004
17 Load Map Wed Dec 15 10:14:22 2004
26 Load Map Wed Dec 15 10:14:22 2004
/netbsd/src/sys/arch/atari/stand/xxboot/
DMILAN_LOADADDR3 LOADADDR= 0x120000 # Load address of 2nd level boot
4 LOADADDR3= 0x128000 # Load address of 3rd level boot
DSTD_LOADADDR3 LOADADDR= 0x20000 # Load address of 2nd level boot
4 LOADADDR3= 0x28000 # Load address of 3rd level boot
/netbsd/src/sys/arch/vax/consolerl/
Ddefboo.hp3 ! Load 'boot.' and boot 4.3BSD.
18 LOAD/START:0 BOOT. ! Load 'boot.' at memory location 0
Ddefboo.up3 ! Load 'boot.' and boot 4.3BSD.
18 LOAD/START:0 BOOT. ! Load 'boot.' at memory location 0
Ddefboo.ra3 ! Load 'boot.' and boot 4.3BSD.
18 LOAD/START:0 BOOT. ! Load 'boot.' at memory location 0
Ddefboo.hk3 ! Load 'boot.' and boot 4.3BSD.
18 LOAD/START:0 BOOT. ! Load 'boot.' at memory location 0
Danyboo.com3 ! Load 'boot.' and boot 4.3BSD.
Dhkmboo.com3 ! Load 'boot.' and boot 4.3BSD.
Dhpmboo.com3 ! Load 'boot.' and boot 4.3BSD.
Dhpsboo.com3 ! Load 'boot.' and boot 4.3BSD.
/netbsd/src/sys/arch/sgimips/
DREADME.IPn31 Architecture ABI Bootstrap Load Address Kernel Load Address
/netbsd/src/external/gpl3/gdb/dist/cpu/
Dsh64-compact.cpu925 (dshci ldc "Load control register (GBR)"
931 (dshci ldcl "Load control register (GBR)"
939 (dshci lds-fpscr "Load status register (FPSCR)"
945 (dshci ldsl-fpscr "Load status register (FPSCR)"
953 (dshci lds-fpul "Load status register (FPUL)"
960 (dshci ldsl-fpul "Load status register (FPUL)"
968 (dshci lds-mach "Load status register (MACH)"
974 (dshci ldsl-mach "Load status register (MACH), post-increment"
982 (dshci lds-macl "Load status register (MACL)"
988 (dshci ldsl-macl "Load status register (MACL), post-increment"
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Dfr30.opc124 0 /* Low. */, 0 /* Load. */);
134 1 /* High. */, 0 /* Load. */);
205 print_register_list (dis_info, value, 8, 0 /* Load. */);
216 print_register_list (dis_info, value, 0, 0 /* Load. */);
/netbsd/src/external/gpl3/binutils/dist/cpu/
Dsh64-compact.cpu925 (dshci ldc "Load control register (GBR)"
931 (dshci ldcl "Load control register (GBR)"
939 (dshci lds-fpscr "Load status register (FPSCR)"
945 (dshci ldsl-fpscr "Load status register (FPSCR)"
953 (dshci lds-fpul "Load status register (FPUL)"
960 (dshci ldsl-fpul "Load status register (FPUL)"
968 (dshci lds-mach "Load status register (MACH)"
974 (dshci ldsl-mach "Load status register (MACH), post-increment"
982 (dshci lds-macl "Load status register (MACL)"
988 (dshci ldsl-macl "Load status register (MACL), post-increment"
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Dfr30.opc124 0 /* Low. */, 0 /* Load. */);
134 1 /* High. */, 0 /* Load. */);
205 print_register_list (dis_info, value, 8, 0 /* Load. */);
216 print_register_list (dis_info, value, 0, 0 /* Load. */);
/netbsd/src/sys/arch/sparc64/sparc64/
Dmp_subr.S216 LDULNG [%l0 + (3f-1b)], %l1 ! Load itlb slot count
217 LDULNG [%l0 + (7f-1b)], %g2 ! Load cpu_args address.
219 ld [%g2 + CBA_CPUTYP], %g3 ! Load cputype
262 LDULNG [%l0 + (4f-1b)], %l1 ! Load dtlb slot count
298 LDULNG [%l0 + (5f-1b)], %l1 ! Load function
/netbsd/src/external/gpl3/binutils/dist/gas/doc/
Dc-nds32.texi182 Load 32-bit address of var into register rt5. @samp{sethi rt5,hi20(var)} and
186 Load value of var into register rt5. @samp{sethi $ta,hi20(var)} and then
190 Load value of var into register rt5. @samp{sethi $ta,hi20(var)} and then
194 Load value of var into register rt5 and increment $ta by amount inc.
202 Load value of var into register rt5 and increment $ta by amount inc.
/netbsd/src/external/bsd/kyua-cli/dist/integration/
Dcmd_list_test.sh444 kyua: E: Load of 'Kyuafile' failed: File 'Kyuafile' not found.
461 kyua: E: Load of 'Kyuafile' failed: File 'Kyuafile' not found.
478 kyua: E: Load of 'Kyuafile' failed: File 'Kyuafile' not found.
529 kyua: E: Load of 'Kyuafile' failed: .*Non-existent test program 'subdir/i-am-missing'.
/netbsd/src/external/lgpl3/gmp/dist/mpn/powerpc64/
Ddarwin.m451 dnl LEAL -- Load Effective Address Local. This is to be used for symbols
70 dnl LEA -- Load Effective Address. This is to be used for symbols defined in
/netbsd/src/external/gpl3/gcc/dist/gcc/config/arm/
Darm1136jfs.md62 (define_cpu_unit "l_a,l_dc1,l_dc2,l_wb" "arm1136jfs") ; Load/Store
286 ;; Load/Store Instructions
300 ;; Load byte results are not available until the writeback stage, where
313 ;; Load/store double words into adjacent registers. The timing and
326 ;; Load/store multiple registers. Two registers are stored per cycle.
/netbsd/src/external/gpl3/gdb/dist/sim/ppc/
Dpowerpc.igen1715 # I.3.3.2 Fixed-Point Load Instructions
1718 0.34,6.RT,11.RA,16.D:D:::Load Byte and Zero
1732 0.31,6.RT,11.RA,16.RB,21.87,31./:X:::Load Byte and Zero Indexed
1745 0.35,6.RT,11.RA,16.D:D:::Load Byte and Zero with Update
1759 0.31,6.RT,11.RA,16.RB,21.119,31./:X:::Load Byte and Zero with Update Indexed
1773 0.40,6.RT,11.RA,16.D:D:::Load Halfword and Zero
1786 0.31,6.RT,11.RA,16.RB,21.279,31./:X:::Load Halfword and Zero Indexed
1799 0.41,6.RT,11.RA,16.D:D:::Load Halfword and Zero with Update
1813 0.31,6.RT,11.RA,16.RB,21.311,31./:X:::Load Halfword and Zero with Update Indexed
1827 0.42,6.RT,11.RA,16.D:D:::Load Halfword Algebraic
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