| /netbsd/src/external/gpl3/gdb/dist/opcodes/ |
| D | mips-dis.c | 486 { "r4000", 1, bfd_mach_mips4000, CPU_R4000, ISA_MIPS3, 0,
495 { "vr4100", 1, bfd_mach_mips4100, CPU_VR4100, ISA_MIPS3, 0,
498 { "vr4111", 1, bfd_mach_mips4111, CPU_R4111, ISA_MIPS3, 0,
501 { "vr4120", 1, bfd_mach_mips4120, CPU_VR4120, ISA_MIPS3, 0,
504 { "r4300", 1, bfd_mach_mips4300, CPU_R4300, ISA_MIPS3, 0,
507 { "r4400", 1, bfd_mach_mips4400, CPU_R4400, ISA_MIPS3, 0,
510 { "r4600", 1, bfd_mach_mips4600, CPU_R4600, ISA_MIPS3, 0,
513 { "r4650", 1, bfd_mach_mips4650, CPU_R4650, ISA_MIPS3, 0,
525 { "r5900", 1, bfd_mach_mips5900, CPU_R5900, ISA_MIPS3, 0,
653 ISA_MIPS3 | INSN_LOONGSON_2E, 0, mips_cp0_names_numeric,
[all …]
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| D | ChangeLog-2016 | 106 ISA_MIPS3 as the `isa' selection in the `bfd_mach_mips16' entry.
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| /netbsd/src/external/gpl3/binutils/dist/opcodes/ |
| D | mips-dis.c | 486 { "r4000", 1, bfd_mach_mips4000, CPU_R4000, ISA_MIPS3, 0,
495 { "vr4100", 1, bfd_mach_mips4100, CPU_VR4100, ISA_MIPS3, 0,
498 { "vr4111", 1, bfd_mach_mips4111, CPU_R4111, ISA_MIPS3, 0,
501 { "vr4120", 1, bfd_mach_mips4120, CPU_VR4120, ISA_MIPS3, 0,
504 { "r4300", 1, bfd_mach_mips4300, CPU_R4300, ISA_MIPS3, 0,
507 { "r4400", 1, bfd_mach_mips4400, CPU_R4400, ISA_MIPS3, 0,
510 { "r4600", 1, bfd_mach_mips4600, CPU_R4600, ISA_MIPS3, 0,
513 { "r4650", 1, bfd_mach_mips4650, CPU_R4650, ISA_MIPS3, 0,
525 { "r5900", 1, bfd_mach_mips5900, CPU_R5900, ISA_MIPS3, 0,
653 ISA_MIPS3 | INSN_LOONGSON_2E, 0, mips_cp0_names_numeric,
[all …]
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| D | ChangeLog-2016 | 106 ISA_MIPS3 as the `isa' selection in the `bfd_mach_mips16' entry.
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| /netbsd/src/external/gpl3/gcc/dist/gcc/config/mips/ |
| D | netbsd.h | 124 else if (ISA_MIPS3) \
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| D | mips.h | 273 #define ISA_MIPS3 (mips_isa == MIPS_ISA_MIPS3) macro
525 else if (ISA_MIPS3) \
976 #define ISA_HAS_64BIT_REGS (ISA_MIPS3 \
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| /netbsd/src/external/gpl3/binutils/dist/gas/config/ |
| D | tc-mips.c | 378 ((ISA) == ISA_MIPS3 \
389 ((ISA) == ISA_MIPS3 \
462 || (ISA) == ISA_MIPS3 \
602 && mips_opts.isa != ISA_MIPS3) \
14940 file_mips_opts.isa = ISA_MIPS3; in md_parse_option()
16967 case ISA_MIPS3: in s_mipsset()
20106 { "mips3", MIPS_CPU_IS_ISA, 0, ISA_MIPS3, CPU_R4000 },
20130 { "r4000", 0, 0, ISA_MIPS3, CPU_R4000 },
20132 { "vr4100", 0, 0, ISA_MIPS3, CPU_VR4100 },
20133 { "vr4111", 0, 0, ISA_MIPS3, CPU_R4111 },
[all …]
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| /netbsd/src/external/gpl3/binutils/dist/include/opcode/ |
| D | mips.h | 1327 #define ISA_MIPS3 INSN_ISA3 macro
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| D | ChangeLog-9103 | 751 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
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| /netbsd/src/external/gpl3/gdb/dist/include/opcode/ |
| D | mips.h | 1327 #define ISA_MIPS3 INSN_ISA3 macro
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| D | ChangeLog-9103 | 751 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
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| /netbsd/src/external/gpl3/gcc/dist/gcc/ |
| D | ChangeLog-2002 | 16384 * config/mips/mips.h (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4,
|