Searched refs:IREG (Results 1 – 10 of 10) sorted by relevance
| /netbsd/src/sys/arch/cobalt/stand/boot/ |
| D | lcd.c | 36 #define IREG 0x00 macro
109 CSR_WRITE(lcd_base, IREG, cmd_ddramset(HD_ROW1_ADDR + i)); in lcd_puts()
113 CSR_WRITE(lcd_base, IREG, cmd_ddramset(HD_ROW2_ADDR + i)); in lcd_puts()
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| /netbsd/src/external/gpl3/gdb/dist/sim/bfin/ |
| D | bfin-sim.c | 385 case 4: return &IREG (reg & 3); in get_allreg()
609 bu64 i = IREG (dagno); in dagadd()
652 STORE (IREG (dagno), res); in dagadd()
660 bu64 i = IREG (dagno); in dagsub()
705 STORE (IREG (dagno), res); in dagsub()
3072 SET_IREG (i, add_brev (IREG (i), MREG (m))); in decode_dagMODim_0()
3148 addr = IREG (i); in decode_dspLDST_0()
3157 addr = IREG (i); in decode_dspLDST_0()
3164 addr = IREG (i); in decode_dspLDST_0()
3171 addr = IREG (i); in decode_dspLDST_0()
[all …]
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| D | bfin-sim.h | 116 #define IREG(x) (BFIN_CPU_STATE.iregs[x]) macro
161 #define SET_IREG(x, val) _SET_CORE32REG_IDX (IREG (x), I, x, val)
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| D | machs.c | 1814 case SIM_BFIN_I0_REGNUM: return &IREG (0); in bfin_get_reg()
1815 case SIM_BFIN_I1_REGNUM: return &IREG (1); in bfin_get_reg()
1816 case SIM_BFIN_I2_REGNUM: return &IREG (2); in bfin_get_reg()
1817 case SIM_BFIN_I3_REGNUM: return &IREG (3); in bfin_get_reg()
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| /netbsd/src/external/gpl3/binutils/dist/opcodes/ |
| D | ChangeLog-2010 | 242 (decode_dagMODim_0): Verify br field for IREG ops.
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| D | ChangeLog-2008 | 802 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
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| D | bfin-dis.c | 667 #define IREG(x) (saved_state.iregs[x]) macro
696 case 4: return &IREG (reg & 3); in get_allreg()
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| /netbsd/src/external/gpl3/gdb/dist/opcodes/ |
| D | ChangeLog-2010 | 242 (decode_dagMODim_0): Verify br field for IREG ops.
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| D | ChangeLog-2008 | 802 (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
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| D | bfin-dis.c | 667 #define IREG(x) (saved_state.iregs[x]) macro
696 case 4: return &IREG (reg & 3); in get_allreg()
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