Searched refs:CPU0_INT_MASK (Results 1 – 2 of 2) sorted by relevance
83 SET_BEBOX_REG(CPU0_INT_MASK, 1 << (31 - irq)); in bebox_enable_irq()90 CLEAR_BEBOX_REG(CPU0_INT_MASK, 1 << (31 - irq)); in bebox_disable_irq()100 state &= READ_BEBOX_REG(CPU0_INT_MASK); in bebox_get_irq()
45 #define CPU0_INT_MASK 0x0f0 /* Interrupt Mask for CPU0 */ macro