| /netbsd/src/sys/arch/sgimips/mace/ |
| D | pci_mace.c | 383 #define CHIP_W1_SYS_END(v) MACE_PCI_HI_MEMORY + 0x7fffffffUL macro
386 #define CHIP_W1_SYS_END(v) MACE_PCI_LOW_MEMORY + 0x01ffffffUL macro
395 #undef CHIP_W1_SYS_END
408 #define CHIP_W1_SYS_END(v) MACE_PCI_HI_IO + 0xffffffffUL macro
411 #define CHIP_W1_SYS_END(v) MACE_PCI_LOW_IO + 0x01ffffffUL macro
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| /netbsd/src/sys/arch/evbmips/malta/ |
| D | malta_bus_mem.c | 61 #define CHIP_W1_SYS_END(v) ((u_long)MALTA_PCIMEM1_BASE + \ macro
69 #define CHIP_W1_SYS_END(v) ((u_long)MALTA_PCIMEM1_BASE + \ macro
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| D | malta_bus_io.c | 54 #define CHIP_W1_SYS_END(v) ((u_long)MALTA_PCIMEM3_BASE + \ macro
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| /netbsd/src/sys/arch/cobalt/dev/ |
| D | gt_mem_space.c | 53 #define CHIP_W1_SYS_END(v) 0x14000000UL macro
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| D | gt_io_space.c | 53 #define CHIP_W1_SYS_END(v) 0x12000000UL macro
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| /netbsd/src/sys/arch/algor/algor/ |
| D | algor_p4032_bus_locio.c | 62 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| D | algor_p5064_bus_io.c | 62 #define CHIP_W1_SYS_END(v) (P5064_PCIIO + 0x00ffffffUL) macro
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| D | algor_p6032_bus_io.c | 62 #define CHIP_W1_SYS_END(v) ((u_long)BONITO_PCIIO_BASE + 0x000fffffUL) macro
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| D | algor_p4032_bus_io.c | 66 #define CHIP_W1_SYS_END(v) (P4032_PCIIO + 0x000fffffUL) macro
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| /netbsd/src/sys/arch/mips/adm5120/ |
| D | adm5120_obio_space.c | 82 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| D | adm5120_pcimem_space.c | 52 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| D | adm5120_pciio_space.c | 52 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| D | adm5120_extio_space.c | 79 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| /netbsd/src/sys/arch/mips/alchemy/ |
| D | au_cpureg_mem.c | 53 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| /netbsd/src/sys/arch/mips/atheros/ |
| D | arbusle.c | 50 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| /netbsd/src/sys/arch/mips/sibyte/pci/ |
| D | sbbrz_bus_mem.c | 55 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| D | sbbrz_bus_io.c | 55 #define CHIP_W1_SYS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_END(v)) macro
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| /netbsd/src/sys/arch/evbmips/gdium/ |
| D | gdium_bus_io.c | 63 #define CHIP_W1_SYS_END(v) ((u_long)BONITO_PCIIO_BASE + 0x000fffffUL) macro
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| /netbsd/src/sys/arch/mips/rmi/ |
| D | rmixl_obio_el_space.c | 60 #define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + RMIXL_IO_DEV_SIZE - 1) macro
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| D | rmixl_obio_eb_space.c | 60 #define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + RMIXL_IO_DEV_SIZE - 1) macro
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| D | rmixl_iobus_space.c | 67 #define CHIP_W1_SYS_END(v) (CHIP_W1_SYS_START(v) + RMIXL_FLASH_BAR_MASK_MAX) macro
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| D | rmixl_pci_ecfg_space.c | 63 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| D | rmixl_pci_io_space.c | 61 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| D | rmixl_pci_cfg_space.c | 63 #define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) macro
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| /netbsd/src/sys/arch/cobalt/cobalt/ |
| D | bus.c | 56 #define CHIP_W1_SYS_END(v) 0x10000fffUL macro
|