| /netbsd/src/external/gpl3/gdb/dist/sim/ppc/ |
| D | idecode_fields.h | 92 #define TO_0_ ((TO & BIT5(0)) != 0)
93 #define TO_1_ ((TO & BIT5(1)) != 0)
94 #define TO_2_ ((TO & BIT5(2)) != 0)
95 #define TO_3_ ((TO & BIT5(3)) != 0)
96 #define TO_4_ ((TO & BIT5(4)) != 0)
98 #define BO_0_ ((BO & BIT5(0)) != 0)
99 #define BO_1_ ((BO & BIT5(1)) != 0)
100 #define BO_2_ ((BO & BIT5(2)) != 0)
101 #define BO_3_ ((BO & BIT5(3)) != 0)
102 #define BO_4_ ((BO & BIT5(4)) != 0)
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| D | bits.h | 96 #define BIT5(POS) (1 << _MAKE_SHIFT(5, POS)) macro
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| /netbsd/src/sys/dev/pci/ |
| D | unichromefb.c | 702 uni_wr_mask(sc, VIACR, CR36, 0, BIT5+BIT4); in uni_crt_enable()
708 uni_wr_mask(sc, VIACR, CR36, BIT5+BIT4, BIT5+BIT4); in uni_crt_disable()
714 uni_wr_mask(sc, VIASR, SR01, 0, BIT5); in uni_screen_enable()
720 uni_wr_mask(sc, VIASR, SR01, 0x20, BIT5); in uni_screen_disable()
787 uni_wr_mask(sc, VIACR, CR11, 0x00, BIT4+BIT5+BIT6); in uni_set_crtc()
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| D | unichromereg.h | 57 #define BIT5 0x20 macro
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| /netbsd/src/external/gpl3/binutils/dist/opcodes/ |
| D | sparc-opc.c | 1933 #define BIT5 (1<<5) macro
1934 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0), "U,d", 0,…
1935 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0), "1,u", 0,…
1936 { "cpush", F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0), "1,2", 0,…
1938 { "cpusha", F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0), "1,2", 0,…
1940 { "cpull", F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d…
1941 #undef BIT5
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| /netbsd/src/external/gpl3/gdb/dist/opcodes/ |
| D | sparc-opc.c | 1933 #define BIT5 (1<<5) macro
1934 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0), "U,d", 0,…
1935 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0), "1,u", 0,…
1936 { "cpush", F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0), "1,2", 0,…
1938 { "cpusha", F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0), "1,2", 0,…
1940 { "cpull", F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d…
1941 #undef BIT5
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| /netbsd/src/external/gpl3/gdb/dist/sim/common/ |
| D | sim-bits.h | 252 #define BIT5(POS) (1 << _LSB_SHIFT (5, (POS))) macro
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| /netbsd/src/sys/external/bsd/acpica/dist/tests/misc/ |
| D | grammar.asl | 5130 BIT5, 1, // single bit field entry
5229 Store (0, BIT5)
5231 If (LNotEqual (BIT5, 0))
6695 BIT5, 1, // single-bit field
6752 // be set. BIT4, BIT6. BIT5 and BIT7 should be clear.
6758 If (BIT5)
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