1 /* $NetBSD: atavar.h,v 1.109 2021/10/05 08:01:05 rin Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _DEV_ATA_ATAVAR_H_ 28 #define _DEV_ATA_ATAVAR_H_ 29 30 #include <sys/lock.h> 31 #include <sys/queue.h> 32 33 #include <dev/ata/ataconf.h> 34 35 /* XXX For scsipi_adapter and scsipi_channel. */ 36 #include <dev/scsipi/scsipi_all.h> 37 #include <dev/scsipi/atapiconf.h> 38 39 /* 40 * Parameters/state needed by the controller to perform an ATA bio. 41 */ 42 struct ata_bio { 43 volatile uint16_t flags;/* cmd flags */ 44 /* 0x0001 free, was ATA_NOSLEEP */ 45 #define ATA_POLL 0x0002 /* poll for completion */ 46 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 47 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 48 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 49 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 50 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 51 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 52 #define ATA_FUA 0x0100 /* transfer uses FUA */ 53 #define ATA_PRIO_HIGH 0x0200 /* transfer has high priority */ 54 daddr_t blkno; /* block addr */ 55 daddr_t blkdone;/* number of blks transferred */ 56 daddr_t nblks; /* number of block currently transferring */ 57 int nbytes; /* number of bytes currently transferring */ 58 long bcount; /* total number of bytes */ 59 char *databuf;/* data buffer address */ 60 volatile int error; 61 #define NOERROR 0 /* There was no error (r_error invalid) */ 62 #define ERROR 1 /* check r_error */ 63 #define ERR_DF 2 /* Drive fault */ 64 #define ERR_DMA 3 /* DMA error */ 65 #define TIMEOUT 4 /* device timed out */ 66 #define ERR_NODEV 5 /* device has been gone */ 67 #define ERR_RESET 6 /* command was terminated by channel reset */ 68 #define REQUEUE 7 /* different xfer failed, requeue command */ 69 uint8_t r_error;/* copy of error register */ 70 struct buf *bp; 71 }; 72 73 /* 74 * ATA/ATAPI commands description 75 * 76 * This structure defines the interface between the ATA/ATAPI device driver 77 * and the controller for short commands. It contains the command's parameter, 78 * the length of data to read/write (if any), and a function to call upon 79 * completion. 80 * If no sleep is allowed, the driver can poll for command completion. 81 * Once the command completed, if the error registered is valid, the flag 82 * AT_ERROR is set and the error register value is copied to r_error . 83 * A separate interface is needed for read/write or ATAPI packet commands 84 * (which need multiple interrupts per commands). 85 */ 86 struct ata_command { 87 /* ATA parameters */ 88 uint64_t r_lba; /* before & after */ 89 uint16_t r_count; /* before & after */ 90 union { 91 uint16_t r_features; /* before */ 92 uint8_t r_error; /* after */ 93 }; 94 union { 95 uint8_t r_command; /* before */ 96 uint8_t r_status; /* after */ 97 }; 98 uint8_t r_device; /* before & after */ 99 100 uint8_t r_st_bmask; /* status register mask to wait for before 101 command */ 102 uint8_t r_st_pmask; /* status register mask to wait for after 103 command */ 104 volatile uint16_t flags; 105 106 #define AT_READ 0x0001 /* There is data to read */ 107 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 108 #define AT_WAIT 0x0008 /* wait in controller for command completion */ 109 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 110 #define AT_DONE 0x0020 /* command is done */ 111 #define AT_XFDONE 0x0040 /* data xfer is done */ 112 #define AT_ERROR 0x0080 /* command is done with error */ 113 #define AT_TIMEOU 0x0100 /* command timed out */ 114 #define AT_DF 0x0200 /* Drive fault */ 115 #define AT_RESET 0x0400 /* command terminated by channel reset */ 116 #define AT_GONE 0x0800 /* command terminated because device is gone */ 117 #define AT_READREG 0x1000 /* Read registers on completion */ 118 #define AT_LBA 0x2000 /* LBA28 */ 119 #define AT_LBA48 0x4000 /* LBA48 */ 120 121 int timeout; /* timeout (in ms) */ 122 void *data; /* Data buffer address */ 123 int bcount; /* number of bytes to transfer */ 124 }; 125 126 /* Forward declaration for ata_xfer */ 127 struct scsipi_xfer; 128 struct ata_xfer_ops; 129 130 /* 131 * Description of a command to be handled by an ATA controller. These 132 * commands are queued in a list. 133 */ 134 struct ata_xfer { 135 int8_t c_slot; /* queue slot # */ 136 137 /* Channel and drive that are to process the request. */ 138 struct ata_channel *c_chp; 139 uint16_t c_drive; 140 uint16_t c_retries; /* number of xfer retry */ 141 142 volatile u_int c_flags; /* command state flags */ 143 void *c_databuf; /* pointer to data buffer */ 144 int c_bcount; /* byte count left */ 145 int c_skip; /* bytes already transferred */ 146 #define ATACH_ERR_ST(error, status) ((error) << 8 | (status)) 147 #define ATACH_ERR(val) (((val) >> 8) & 0xff) 148 #define ATACH_ST(val) (((val) >> 0) & 0xff) 149 150 union { 151 struct ata_bio c_bio; /* ATA transfer */ 152 struct ata_command c_ata_c; /* ATA command */ 153 struct { 154 struct scsipi_xfer *c_scsipi; /* SCSI transfer */ 155 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 156 int c_lenoff; /* offset to c_bcount (ATAPI) */ 157 } atapi; 158 } u; 159 #define c_bio u.c_bio 160 #define c_ata_c u.c_ata_c 161 #define c_atapi u.atapi 162 #define c_scsipi c_atapi.c_scsipi 163 164 /* Link on the command queue. */ 165 SIMPLEQ_ENTRY(ata_xfer) c_xferchain; 166 TAILQ_ENTRY(ata_xfer) c_activechain; 167 168 /* Links for error handling */ 169 SLIST_ENTRY(ata_xfer) c_retrychain; 170 171 /* Low-level protocol handlers. */ 172 const struct ata_xfer_ops *ops; 173 }; 174 175 struct ata_xfer_ops { 176 int (*c_start)(struct ata_channel *, struct ata_xfer *); 177 #define ATASTART_STARTED 0 /* xfer started, waiting for intr */ 178 #define ATASTART_TH 1 /* xfer needs to be run in thread */ 179 #define ATASTART_POLL 2 /* xfer needs to be polled */ 180 #define ATASTART_ABORT 3 /* error occurred, abort xfer */ 181 int (*c_poll)(struct ata_channel *, struct ata_xfer *); 182 #define ATAPOLL_DONE 0 183 #define ATAPOLL_AGAIN 1 184 void (*c_abort)(struct ata_channel *, struct ata_xfer *); 185 int (*c_intr)(struct ata_channel *, struct ata_xfer *, int); 186 void (*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int); 187 }; 188 189 /* flags in c_flags */ 190 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 191 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 192 #define C_POLL 0x0004 /* command is polled */ 193 #define C_DMA 0x0008 /* command uses DMA */ 194 #define C_WAIT 0x0010 /* can use kpause */ 195 #define C_WAITACT 0x0020 /* wakeup when active */ 196 #define C_FREE 0x0040 /* call ata_free_xfer() asap */ 197 #define C_PIOBM 0x0080 /* command uses busmastering PIO */ 198 #define C_NCQ 0x0100 /* command is queued */ 199 #define C_SKIP_QUEUE 0x0200 /* skip xfer queue */ 200 #define C_WAITTIMO 0x0400 /* race vs. timeout */ 201 #define C_CHAOS 0x0800 /* forced error xfer */ 202 #define C_RECOVERED 0x1000 /* error recovered, no need for reset */ 203 #define C_PRIVATE_ALLOC 0x2000 /* private alloc, skip pool_put() */ 204 205 /* reasons for c_kill_xfer() */ 206 #define KILL_GONE 1 /* device is gone while xfer was active */ 207 #define KILL_RESET 2 /* xfer was reset */ 208 #define KILL_GONE_INACTIVE 3 /* device is gone while xfer was pending */ 209 #define KILL_REQUEUE 4 /* xfer must be reissued to device, no err */ 210 211 /* 212 * While hw supports up to 32 tags, in practice we must never 213 * allow 32 active commands, since that would signal same as 214 * channel error. We use slot 32 only for error recovery if available. 215 */ 216 #define ATA_MAX_OPENINGS 32 217 #define ATA_REAL_OPENINGS(op) ((op) > 1 ? (op) - 1 : 1) 218 219 #define ATA_BSIZE 512 /* Standard ATA block size (bytes) */ 220 221 /* Per-channel queue of ata_xfers */ 222 #ifndef ATABUS_PRIVATE 223 struct ata_queue; 224 #else 225 struct ata_queue { 226 int8_t queue_flags; /* flags for this queue */ 227 #define QF_IDLE_WAIT 0x01 /* someone wants the controller idle */ 228 #define QF_NEED_XFER 0x02 /* someone wants xfer */ 229 int8_t queue_active; /* number of active transfers */ 230 uint8_t queue_openings; /* max number of active xfers */ 231 SIMPLEQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */ 232 int queue_freeze; /* freeze count for the queue */ 233 kcondvar_t queue_drain; /* c: waiting of queue drain */ 234 kcondvar_t queue_idle; /* c: waiting of queue idle */ 235 TAILQ_HEAD(, ata_xfer) active_xfers; /* active commands */ 236 uint32_t active_xfers_used; /* mask of active commands */ 237 uint32_t queue_xfers_avail; /* available xfers mask */ 238 uint32_t queue_hold; /* slots held during recovery */ 239 kcondvar_t c_active; /* somebody actively waiting for xfer */ 240 kcondvar_t c_cmd_finish; /* somebody waiting for cmd finish */ 241 }; 242 #endif 243 244 /* ATA bus instance state information. */ 245 struct atabus_softc { 246 device_t sc_dev; 247 struct ata_channel *sc_chan; 248 int sc_flags; 249 #define ATABUSCF_OPEN 0x01 250 }; 251 252 /* 253 * A queue of atabus instances, used to ensure the same bus probe order 254 * for a given hardware configuration at each boot. 255 */ 256 struct atabus_initq { 257 TAILQ_ENTRY(atabus_initq) atabus_initq; 258 struct atabus_softc *atabus_sc; 259 }; 260 261 /* High-level functions and structures used by both ATA and ATAPI devices */ 262 struct ataparams; 263 264 /* Datas common to drives and controller drivers */ 265 struct ata_drive_datas { 266 uint8_t drive; /* drive number */ 267 int8_t ata_vers; /* ATA version supported */ 268 uint16_t drive_flags; /* bitmask for drives present/absent and cap */ 269 #define ATA_DRIVE_CAP32 0x0001 /* 32-bit transfer capable */ 270 #define ATA_DRIVE_DMA 0x0002 271 #define ATA_DRIVE_UDMA 0x0004 272 #define ATA_DRIVE_MODE 0x0008 /* the drive reported its mode */ 273 #define ATA_DRIVE_RESET 0x0010 /* reset the drive state at next xfer */ 274 #define ATA_DRIVE_WAITDRAIN 0x0020 /* device is waiting for the queue to drain */ 275 #define ATA_DRIVE_NOSTREAM 0x0040 /* no stream methods on this drive */ 276 #define ATA_DRIVE_ATAPIDSCW 0x0080 /* needs to wait for DSC in phase_complete */ 277 #define ATA_DRIVE_WFUA 0x0100 /* drive supports WRITE DMA FUA EXT */ 278 #define ATA_DRIVE_NCQ 0x0200 /* drive supports NCQ feature set */ 279 #define ATA_DRIVE_NCQ_PRIO 0x0400 /* drive supports NCQ PRIO field */ 280 #define ATA_DRIVE_TH_RESET 0x0800 /* drive waits for thread drive reset */ 281 282 uint8_t drive_type; 283 #define ATA_DRIVET_NONE 0 284 #define ATA_DRIVET_ATA 1 285 #define ATA_DRIVET_ATAPI 2 286 #define ATA_DRIVET_OLD 3 287 #define ATA_DRIVET_PM 4 288 289 /* 290 * Current setting of drive's PIO, DMA and UDMA modes. 291 * Is initialised by the disks drivers at attach time, and may be 292 * changed later by the controller's code if needed 293 */ 294 uint8_t PIO_mode; /* Current setting of drive's PIO mode */ 295 #if NATA_DMA 296 uint8_t DMA_mode; /* Current setting of drive's DMA mode */ 297 #if NATA_UDMA 298 uint8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 299 #endif 300 #endif 301 302 /* Supported modes for this drive */ 303 uint8_t PIO_cap; /* supported drive's PIO mode */ 304 #if NATA_DMA 305 uint8_t DMA_cap; /* supported drive's DMA mode */ 306 #if NATA_UDMA 307 uint8_t UDMA_cap; /* supported drive's UDMA mode */ 308 #endif 309 #endif 310 311 /* 312 * Drive state. 313 * This is reset to 0 after a channel reset. 314 */ 315 uint8_t state; 316 317 #define RESET 0 318 #define READY 1 319 320 uint8_t drv_openings; /* # of command tags */ 321 322 #if NATA_DMA 323 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 324 uint8_t n_dmaerrs; 325 uint32_t n_xfers; 326 327 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 328 #define NERRS_MAX 4 329 #define NXFER 4000 330 #endif 331 332 /* Callbacks into the drive's driver. */ 333 void (*drv_done)(device_t, struct ata_xfer *); /* xfer is done */ 334 335 device_t drv_softc; /* ATA drives softc, if any */ 336 struct ata_channel *chnl_softc; /* channel softc */ 337 338 /* Context used for I/O */ 339 struct disklabel *lp; /* pointer to drive's label info */ 340 uint8_t multi; /* # of blocks to transfer in multi-mode */ 341 daddr_t badsect[127]; /* 126 plus trailing -1 marker */ 342 }; 343 344 /* User config flags that force (or disable) the use of a mode */ 345 #define ATA_CONFIG_PIO_MODES 0x0007 346 #define ATA_CONFIG_PIO_SET 0x0008 347 #define ATA_CONFIG_PIO_OFF 0 348 #define ATA_CONFIG_DMA_MODES 0x0070 349 #define ATA_CONFIG_DMA_SET 0x0080 350 #define ATA_CONFIG_DMA_DISABLE 0x0070 351 #define ATA_CONFIG_DMA_OFF 4 352 #define ATA_CONFIG_UDMA_MODES 0x0700 353 #define ATA_CONFIG_UDMA_SET 0x0800 354 #define ATA_CONFIG_UDMA_DISABLE 0x0700 355 #define ATA_CONFIG_UDMA_OFF 8 356 357 /* 358 * ata_bustype. The first field must be compatible with scsipi_bustype, 359 * as it's used for autoconfig by both ata and atapi drivers. 360 */ 361 struct ata_bustype { 362 int bustype_type; /* symbolic name of type */ 363 void (*ata_bio)(struct ata_drive_datas *, struct ata_xfer *); 364 void (*ata_reset_drive)(struct ata_drive_datas *, int, uint32_t *); 365 void (*ata_reset_channel)(struct ata_channel *, int); 366 void (*ata_exec_command)(struct ata_drive_datas *, 367 struct ata_xfer *); 368 369 #define ATACMD_COMPLETE 0x01 370 #define ATACMD_QUEUED 0x02 371 #define ATACMD_TRY_AGAIN 0x03 372 373 int (*ata_get_params)(struct ata_drive_datas *, uint8_t, 374 struct ataparams *); 375 int (*ata_addref)(struct ata_drive_datas *); 376 void (*ata_delref)(struct ata_drive_datas *); 377 void (*ata_killpending)(struct ata_drive_datas *); 378 void (*ata_recovery)(struct ata_channel *, int, uint32_t); 379 }; 380 381 /* bustype_type */ /* XXX XXX XXX */ 382 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 383 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 384 #define SCSIPI_BUSTYPE_ATA 2 385 386 /* 387 * Describe an ATA device. Has to be compatible with scsipi_channel, so 388 * start with a pointer to ata_bustype. 389 */ 390 struct ata_device { 391 const struct ata_bustype *adev_bustype; 392 int adev_channel; 393 struct ata_drive_datas *adev_drv_data; 394 }; 395 396 /* 397 * Per-channel data 398 */ 399 struct ata_channel { 400 int ch_channel; /* location */ 401 struct atac_softc *ch_atac; /* ATA controller softc */ 402 kmutex_t ch_lock; /* channel lock - queue */ 403 404 /* Our state */ 405 volatile int ch_flags; 406 #define ATACH_SHUTDOWN 0x02 /* channel is shutting down */ 407 #define ATACH_IRQ_WAIT 0x10 /* controller is waiting for irq */ 408 #define ATACH_DMA_WAIT 0x20 /* controller is waiting for DMA */ 409 #define ATACH_PIOBM_WAIT 0x40 /* controller is waiting for busmastering PIO */ 410 #define ATACH_DISABLED 0x80 /* channel is disabled */ 411 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */ 412 #define ATACH_TH_RESCAN 0x400 /* rescan requested */ 413 #define ATACH_NCQ 0x800 /* channel executing NCQ commands */ 414 #define ATACH_DMA_BEFORE_CMD 0x01000 /* start DMA first */ 415 #define ATACH_TH_DRIVE_RESET 0x02000 /* asked thread to drive(s) reset */ 416 #define ATACH_RECOVERING 0x04000 /* channel is recovering */ 417 #define ATACH_TH_RECOVERY 0x08000 /* asked thread to run recovery */ 418 #define ATACH_DETACHED 0x10000 /* channel was destroyed */ 419 420 #define ATACH_NODRIVE 0xff /* no drive selected for reset */ 421 422 /* for the timeout callout */ 423 struct callout c_timo_callout; /* timeout callout handle */ 424 425 /* per-drive info */ 426 int ch_ndrives; /* number of entries in ch_drive[] */ 427 struct ata_drive_datas *ch_drive; /* array of ata_drive_datas */ 428 429 device_t atabus; /* self */ 430 431 /* ATAPI children */ 432 device_t atapibus; 433 struct scsipi_channel ch_atapi_channel; 434 435 /* 436 * Channel queues. May be the same for all channels, if hw 437 * channels are not independent. 438 */ 439 struct ata_queue *ch_queue; 440 441 /* The channel kernel thread */ 442 struct lwp *ch_thread; 443 kcondvar_t ch_thr_idle; /* thread waiting for work */ 444 445 /* Number of sata PMP ports, if any */ 446 int ch_satapmp_nports; 447 448 /* Recovery buffer */ 449 struct ata_xfer recovery_xfer; 450 uint8_t recovery_blk[ATA_BSIZE]; 451 uint32_t recovery_tfd; /* status/err encoded ATACH_ERR_ST() */ 452 }; 453 454 /* 455 * ATA controller softc. 456 * 457 * This contains a bunch of generic info that all ATA controllers need 458 * to have. 459 * 460 * XXX There is still some lingering wdc-centricity here. 461 */ 462 struct atac_softc { 463 device_t atac_dev; /* generic device info */ 464 465 int atac_cap; /* controller capabilities */ 466 467 #define ATAC_CAP_DATA16 0x0001 /* can do 16-bit data access */ 468 #define ATAC_CAP_DATA32 0x0002 /* can do 32-bit data access */ 469 #define ATAC_CAP_DMA 0x0008 /* can do ATA DMA modes */ 470 #define ATAC_CAP_UDMA 0x0010 /* can do ATA Ultra DMA modes */ 471 #define ATAC_CAP_PIOBM 0x0020 /* can do busmastering PIO transfer */ 472 #define ATAC_CAP_ATA_NOSTREAM 0x0040 /* don't use stream funcs on ATA */ 473 #define ATAC_CAP_ATAPI_NOSTREAM 0x0080 /* don't use stream funcs on ATAPI */ 474 #define ATAC_CAP_NOIRQ 0x1000 /* controller never interrupts */ 475 #define ATAC_CAP_RAID 0x4000 /* controller "supports" RAID */ 476 #define ATAC_CAP_NCQ 0x8000 /* controller supports NCQ */ 477 478 uint8_t atac_pio_cap; /* highest PIO mode supported */ 479 #if NATA_DMA 480 uint8_t atac_dma_cap; /* highest DMA mode supported */ 481 #if NATA_UDMA 482 uint8_t atac_udma_cap; /* highest UDMA mode supported */ 483 #endif 484 #endif 485 486 /* Array of pointers to channel-specific data. */ 487 struct ata_channel **atac_channels; 488 int atac_nchannels; 489 490 const struct ata_bustype *atac_bustype_ata; 491 492 /* 493 * Glue between ATA and SCSIPI for the benefit of ATAPI. 494 * 495 * Note: The reference count here is used for both ATA and ATAPI 496 * devices. 497 */ 498 struct atapi_adapter atac_atapi_adapter; 499 void (*atac_atapibus_attach)(struct atabus_softc *); 500 501 /* Driver callback to probe for drives. */ 502 void (*atac_probe)(struct ata_channel *); 503 504 /* 505 * Optional callbacks to lock/unlock hardware. 506 * Called with channel mutex held. 507 */ 508 int (*atac_claim_hw)(struct ata_channel *, int); 509 void (*atac_free_hw)(struct ata_channel *); 510 511 /* 512 * Optional callbacks to set drive mode. Required for anything 513 * but basic PIO operation. 514 */ 515 void (*atac_set_modes)(struct ata_channel *); 516 }; 517 518 #ifdef _KERNEL 519 void ata_channel_attach(struct ata_channel *); 520 void ata_channel_init(struct ata_channel *); 521 void ata_channel_detach(struct ata_channel *); 522 void ata_channel_destroy(struct ata_channel *); 523 int atabusprint(void *aux, const char *); 524 int ataprint(void *aux, const char *); 525 526 int atabus_alloc_drives(struct ata_channel *, int); 527 void atabus_free_drives(struct ata_channel *); 528 529 struct ataparams; 530 int ata_get_params(struct ata_drive_datas *, uint8_t, struct ataparams *); 531 int ata_set_mode(struct ata_drive_datas *, uint8_t, uint8_t); 532 int ata_read_log_ext_ncq(struct ata_drive_datas *, uint8_t, uint8_t *, 533 uint8_t *, uint8_t *); 534 void ata_recovery_resume(struct ata_channel *, int, int, int); 535 536 /* return code for these cmds */ 537 #define CMD_OK 0 538 #define CMD_ERR 1 539 #define CMD_AGAIN 2 540 541 struct ata_xfer *ata_get_xfer(struct ata_channel *, bool); 542 void ata_free_xfer(struct ata_channel *, struct ata_xfer *); 543 void ata_deactivate_xfer(struct ata_channel *, struct ata_xfer *); 544 void ata_exec_xfer(struct ata_channel *, struct ata_xfer *); 545 int ata_xfer_start(struct ata_xfer *xfer); 546 void ata_wait_cmd(struct ata_channel *, struct ata_xfer *xfer); 547 548 void ata_timeout(void *); 549 bool ata_timo_xfer_check(struct ata_xfer *); 550 void ata_kill_pending(struct ata_drive_datas *); 551 void ata_kill_active(struct ata_channel *, int, int); 552 void ata_thread_run(struct ata_channel *, int, int, int); 553 bool ata_is_thread_run(struct ata_channel *); 554 void ata_channel_freeze(struct ata_channel *); 555 void ata_channel_thaw_locked(struct ata_channel *); 556 void ata_channel_lock(struct ata_channel *); 557 void ata_channel_unlock(struct ata_channel *); 558 void ata_channel_lock_owned(struct ata_channel *); 559 560 int ata_addref(struct ata_channel *); 561 void ata_delref(struct ata_channel *); 562 void atastart(struct ata_channel *); 563 void ata_print_modes(struct ata_channel *); 564 void ata_probe_caps(struct ata_drive_datas *); 565 566 #if NATA_DMA 567 void ata_dmaerr(struct ata_drive_datas *, int); 568 #endif 569 struct ata_queue * 570 ata_queue_alloc(uint8_t openings); 571 void ata_queue_free(struct ata_queue *); 572 struct ata_xfer * 573 ata_queue_hwslot_to_xfer(struct ata_channel *, int); 574 struct ata_xfer * 575 ata_queue_get_active_xfer(struct ata_channel *); 576 struct ata_xfer * 577 ata_queue_get_active_xfer_locked(struct ata_channel *); 578 struct ata_xfer * 579 ata_queue_drive_active_xfer(struct ata_channel *, int); 580 bool ata_queue_alloc_slot(struct ata_channel *, uint8_t *, uint8_t); 581 void ata_queue_free_slot(struct ata_channel *, uint8_t); 582 uint32_t ata_queue_active(struct ata_channel *); 583 uint8_t ata_queue_openings(struct ata_channel *); 584 void ata_queue_hold(struct ata_channel *); 585 void ata_queue_unhold(struct ata_channel *); 586 587 void ata_delay(struct ata_channel *, int, const char *, int); 588 589 bool ata_waitdrain_xfer_check(struct ata_channel *, struct ata_xfer *); 590 591 void atacmd_toncq(struct ata_xfer *, uint8_t *, uint16_t *, uint16_t *, 592 uint8_t *); 593 594 #ifdef ATADEBUG 595 void atachannel_debug(struct ata_channel *); 596 #endif 597 598 #endif /* _KERNEL */ 599 600 #endif /* _DEV_ATA_ATAVAR_H_ */ 601