Searched refs:AR_IMR_S3 (Results 1 – 3 of 3) sorted by relevance
59 #define AR_IMR_S3 0x00b0 /* Secondary interrupt mask reg 3 */ macro
56 #define AR_IMR_S3 0x00b0 /* MAC Secondary interrupt mask register 3 */ macro
61 #define AR_IMR_S3 0x00b0 macro