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Searched refs:v8 (Results 1 – 11 of 11) sorted by relevance

/mirbsd/src/gnu/usr.bin/binutils/opcodes/
Dsparc-opc.c56 #define v8 (MASK_V8 | MASK_SPARCLET | MASK_SPARCLITE \ macro
697 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", 0, v8 },
698 { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", 0, v8 }, /* flush rs1+%g0 */
699 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", 0, v8 }, /* flush rs1+0 */
700 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0, "i", 0, v8 }, /* flush %g0+i */
701 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", 0, v8 },
702 { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", 0, v8 },
722 { "stbar", F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0|RS1(~0xf)|SIMM13(~0), "", 0, v8 },
809 { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", 0, v8 }, /* wr r,r,%asrX */
810 { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", 0, v8 }, /* wr r,i,%asrX */
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/mirbsd/src/etc/etc.sparc/
Dmake.cfg.md5 _DEFCOPTS:= -mcpu=v8 -mtune=hypersparc
6 _DEFCOPTS_llvm:=-mcpu=v8 -mtune=hypersparc
/mirbsd/src/gnu/usr.bin/binutils/gas/doc/
Dc-sparc.texi45 GAS treats sparclite as being compatible with v8, unless an architecture
/mirbsd/src/gnu/usr.bin/binutils/cpu/
Dcris.cpu100 (define-cpu-cris v8 "CRIS v8 family")
131 (define-mach-cris v8 "Generic CRIS v8 CPU, ETRAX 100" "cris")
159 (define-model-simplecris v8 "Model of CRIS v8, ETRAX 100")
169 ; generating sims for v0, v3 or v8), add 0, 3 and 8 to
398 (define-pmacro (cris-implemented-specregs-v8)
399 "Special registers in v8 and their sizes"
403 cris-implemented-specregs-const-v8
404 cris-implemented-specregs-v8
2691 (cris-move-c-spr v8 (.pmacro (x) v8))
/mirbsd/src/gnu/usr.bin/binutils/gas/config/
Dtc-sparc.c233 enum sparc_arch_types {v6, v7, v8, sparclet, sparclite, sparc86x, v8plus, enumerator
248 { "v8", "v8", v8, 32, 1 },
261 { NULL, NULL, v8, 0, 0 }
Dtc-arm.c7732 REGDEF(v5,8,RN), REGDEF(v6,9,RN), REGDEF(v7,10,RN), REGDEF(v8,11,RN),
/mirbsd/src/sys/arch/sparc/conf/
DFLOPPY124 # sun4 commented out due to v8 CFLAGS anyways, and devices below.
DGENERIC133 # sun4 commented out due to v8 CFLAGS anyways, and devices below.
DRAMDISK124 # sun4 commented out due to v8 CFLAGS anyways, and devices below.
/mirbsd/src/lib/libssl/src/
DConfigure205 # SC4.2 is ok, better than gcc even on bn as long as you tell it -xarch=v8
208 "solaris-sparcv8-cc","cc:-xarch=v8 -xO5 -xstrconst -xdepend -Xa -DB_ENDIAN -DBN_DIV2W::-D_REENTRANT…
212 …N_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG_ALL -xarch=v8 -g -O -xstrconst -Xa…
/mirbsd/src/sys/arch/sparc/sparc/
Dlocore.s912 VTRAP(T_TEXTFAULT, memfault_sun4m) ! 21 = v8 instr. fetch error
920 VTRAP(T_DATAFAULT, memfault_sun4m) ! 29 = v8 data fetch error
921 TRAP(T_DIV0) ! 2a = v8 int divide by zero