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Searched refs:ra_reg (Results 1 – 25 of 57) sorted by relevance

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/mirbsd/src/sys/arch/sparc/dev/
Dxbox.c101 sc->sc_regs.xa_write0 = mapiodev(&ca->ca_ra.ra_reg[0], 0,
103 sc->sc_regs.xa_errs = mapiodev(&ca->ca_ra.ra_reg[1], 0,
105 sc->sc_regs.xa_ctl0 = mapiodev(&ca->ca_ra.ra_reg[2], 0,
107 sc->sc_regs.xa_ctl1 = mapiodev(&ca->ca_ra.ra_reg[3], 0,
109 sc->sc_regs.xa_elua = mapiodev(&ca->ca_ra.ra_reg[4], 0,
111 sc->sc_regs.xa_ella = mapiodev(&ca->ca_ra.ra_reg[5], 0,
113 sc->sc_regs.xa_rsrv = mapiodev(&ca->ca_ra.ra_reg[6], 0,
115 sc->sc_regs.xb_errs = mapiodev(&ca->ca_ra.ra_reg[7], 0,
117 sc->sc_regs.xb_ctl0 = mapiodev(&ca->ca_ra.ra_reg[8], 0,
119 sc->sc_regs.xb_ctl1 = mapiodev(&ca->ca_ra.ra_reg[9], 0,
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Dfga.c162 sc->sc_regs = mapiodev(&(ca->ca_ra.ra_reg[0]), 0,
163 ca->ca_ra.ra_reg[0].rr_len);
281 oca->ca_ra.ra_reg[0].rr_len = vmelen;
282 oca->ca_ra.ra_reg[0].rr_paddr =
284 oca->ca_ra.ra_reg[0].rr_iospace = sbusslot;
285 oca->ca_ra.ra_reg[1].rr_iospace = vmecap;
286 oca->ca_ra.ra_reg[1].rr_paddr = (void *)vmebase;
287 oca->ca_ra.ra_reg[1].rr_len = vmelen;
723 atype = (ca->ca_ra.ra_reg[1].rr_iospace & VME_MASTER_CAP_ADDR) >> 2;
724 dtype = (ca->ca_ra.ra_reg[1].rr_iospace & VME_MASTER_CAP_DATA) >> 5;
[all …]
Dsbus.c238 base = (int)ca->ca_ra.ra_reg[i].rr_paddr;
239 ca->ca_ra.ra_reg[i].rr_paddr =
241 ca->ca_ra.ra_reg[i].rr_iospace = PMAP_OBIO;
252 int j, cspace = ca->ca_ra.ra_reg[i].rr_iospace;
256 int tmp = (int)ca->ca_ra.ra_reg[i].rr_paddr;
258 ca->ca_ra.ra_reg[i].rr_paddr = (void *)tmp;
259 ca->ca_ra.ra_reg[i].rr_iospace =
Dqec.c133 sc->sc_regs = mapiodev(&ca->ca_ra.ra_reg[0], 0,
135 sc->sc_bufsiz = ca->ca_ra.ra_reg[1].rr_len;
136 sc->sc_paddr = ca->ca_ra.ra_reg[0].rr_paddr;
251 int j, cspace = ca->ca_ra.ra_reg[i].rr_iospace;
255 int tmp = (int)ca->ca_ra.ra_reg[i].rr_paddr;
257 ca->ca_ra.ra_reg[i].rr_paddr = (void *)tmp;
258 ca->ca_ra.ra_reg[i].rr_iospace =
Dcgeight.c158 mapiodev(ca->ca_ra.ra_reg, 0, sizeof(u_int32_t)); in cgeightattach()
173 mapiodev(ca->ca_ra.ra_reg, in cgeightattach()
176 sc->sc_phys = ca->ca_ra.ra_reg[0]; in cgeightattach()
189 sc->sc_enable = (volatile u_char *)mapiodev(ca->ca_ra.ra_reg, in cgeightattach()
191 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(ca->ca_ra.ra_reg, in cgeightattach()
Dstp_sbus.c109 ssc->sc_reg = ca->ca_ra.ra_reg[0];
110 ssc->sc_reg_le = ca->ca_ra.ra_reg[0];
145 if (bus_space_map(&ca->ca_ra.ra_reg[i], 0,
146 ca->ca_ra.ra_reg[i].rr_len, 0, &bh) != 0) {
Dtcx.c193 sc->sc_phys[i] = ca->ca_ra.ra_reg[i]; in tcxattach()
196 mapiodev(&ca->ca_ra.ra_reg[TCX_REG_CMAP], 0, sizeof *sc->sc_bt); in tcxattach()
198 mapiodev(&ca->ca_ra.ra_reg[TCX_REG_THC], in tcxattach()
205 sc->sc_dfb8 = mapiodev(&ca->ca_ra.ra_reg[TCX_REG_DFB8], 0, in tcxattach()
210 sc->sc_dfb8 = mapiodev(&ca->ca_ra.ra_reg[TCX_REG_DFB8], 0, in tcxattach()
214 sc->sc_dfb24 = mapiodev(&ca->ca_ra.ra_reg[TCX_REG_DFB24], 0, in tcxattach()
216 sc->sc_cplane = mapiodev(&ca->ca_ra.ra_reg[TCX_REG_RDFB32], 0, in tcxattach()
Dcgtwelve.c154 sc->sc_phys = ca->ca_ra.ra_reg[0]; in cgtwelveattach()
159 sc->sc_dpu = (struct cgtwelve_dpu *)mapiodev(ca->ca_ra.ra_reg, in cgtwelveattach()
161 sc->sc_apu = (struct cgtwelve_apu *)mapiodev(ca->ca_ra.ra_reg, in cgtwelveattach()
163 sc->sc_ramdac = (struct cgtwelve_dac *)mapiodev(ca->ca_ra.ra_reg, in cgtwelveattach()
182 sc->sc_overlay = mapiodev(ca->ca_ra.ra_reg, in cgtwelveattach()
186 sc->sc_inten = mapiodev(ca->ca_ra.ra_reg, in cgtwelveattach()
Dcgtwo.c162 tmp = (caddr_t)mapdev(ra->ra_reg, TMPMAP_VA, CG2_CTLREG_OFF, NBPG); in cgtwomatch()
192 sc->sc_phys = ca->ca_ra.ra_reg[0]; in cgtwoattach()
197 mapiodev(ca->ca_ra.ra_reg, in cgtwoattach()
202 mapiodev(ca->ca_ra.ra_reg, in cgtwoattach()
207 mapiodev(ca->ca_ra.ra_reg, in cgtwoattach()
Dbwtwo.c196 mapiodev(ca->ca_ra.ra_reg, 0, sizeof(u_int32_t)); in bwtwoattach()
201 mapiodev(ca->ca_ra.ra_reg, BWREG_REG, in bwtwoattach()
266 sc->sc_phys = ca->ca_ra.ra_reg[0]; in bwtwoattach()
275 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(ca->ca_ra.ra_reg, in bwtwoattach()
Dflash.c107 sc->sc_regs = mapiodev(&(ca->ca_ra.ra_reg[0]), 0,
108 ca->ca_ra.ra_reg[0].rr_len);
112 printf(": window 0x%x\n", ca->ca_ra.ra_reg[0].rr_len);
Dvigra.c267 sc->sc_regs = mapiodev(&ca->ca_ra.ra_reg[VIGRA_REG_CSR], 0, in vigraattach()
268 ca->ca_ra.ra_reg[VIGRA_REG_CSR].rr_len); in vigraattach()
269 sc->sc_ramdac = mapiodev(&ca->ca_ra.ra_reg[VIGRA_REG_RAMDAC], 0, in vigraattach()
270 ca->ca_ra.ra_reg[VIGRA_REG_RAMDAC].rr_len); in vigraattach()
271 sc->sc_phys = ca->ca_ra.ra_reg[VIGRA_REG_VRAM]; in vigraattach()
281 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(&ca->ca_ra.ra_reg[VIGRA_REG_VRAM], in vigraattach()
Dcgsix.c189 tmp = (caddr_t)mapdev(ra->ra_reg, TMPMAP_VA, in cgsixmatch()
219 sc->sc_phys = ca->ca_ra.ra_reg[0]; in cgsixattach()
221 mapiodev(ca->ca_ra.ra_reg, CGSIX_BT_OFFSET, CGSIX_BT_SIZE); in cgsixattach()
223 mapiodev(ca->ca_ra.ra_reg, CGSIX_FHC_OFFSET, CGSIX_FHC_SIZE); in cgsixattach()
225 mapiodev(ca->ca_ra.ra_reg, CGSIX_THC_OFFSET, CGSIX_THC_SIZE); in cgsixattach()
227 mapiodev(ca->ca_ra.ra_reg, CGSIX_FBC_OFFSET, CGSIX_FBC_SIZE); in cgsixattach()
229 mapiodev(ca->ca_ra.ra_reg, CGSIX_TEC_OFFSET, CGSIX_TEC_SIZE); in cgsixattach()
277 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(ca->ca_ra.ra_reg, in cgsixattach()
Dtvtwo.c215 sc->sc_regs = mapiodev(ca->ca_ra.ra_reg, PX_REG_OFFSET, PX_REG_SIZE); in tvtwoattach()
259 sc->sc_phys = ca->ca_ra.ra_reg[0]; in tvtwoattach()
260 sc->sc_m8 = mapiodev(ca->ca_ra.ra_reg, in tvtwoattach()
262 sc->sc_m24 = mapiodev(ca->ca_ra.ra_reg, in tvtwoattach()
Dhme.c180 sc->sc_gr = mapiodev(&(ca->ca_ra.ra_reg[0]), 0,
181 ca->ca_ra.ra_reg[0].rr_len);
182 sc->sc_txr = mapiodev(&(ca->ca_ra.ra_reg[1]), 0,
183 ca->ca_ra.ra_reg[1].rr_len);
184 sc->sc_rxr = mapiodev(&(ca->ca_ra.ra_reg[2]), 0,
185 ca->ca_ra.ra_reg[2].rr_len);
186 sc->sc_cr = mapiodev(&(ca->ca_ra.ra_reg[3]), 0,
187 ca->ca_ra.ra_reg[3].rr_len);
188 sc->sc_tcvr = mapiodev(&(ca->ca_ra.ra_reg[4]), 0,
189 ca->ca_ra.ra_reg[4].rr_len);
Dcgfour.c156 mapiodev(ca->ca_ra.ra_reg, 0, sizeof(u_int32_t)); in cgfourattach()
176 sc->sc_phys = ca->ca_ra.ra_reg[0]; in cgfourattach()
193 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(ca->ca_ra.ra_reg, in cgfourattach()
Dobio.c352 mapdev(&ra->ra_reg[0], 0, 0, ra->ra_reg[0].rr_len);
354 mapdev(&ra->ra_reg[1], 0, 0, ra->ra_reg[1].rr_len);
479 tmp = (caddr_t)mapdev(oca.ca_ra.ra_reg, TMPMAP_VA, 0, NBPG);
517 bus_map(oca.ca_ra.ra_reg, oca.ca_ra.ra_len);
Dled.c117 sc->sc_reg = mapiodev(&(ca->ca_ra.ra_reg[0]), 0,
118 ca->ca_ra.ra_reg[0].rr_len);
Dzx.c212 sc->sc_phys = ca->ca_ra.ra_reg[0]; in zx_attach()
215 mapiodev(ca->ca_ra.ra_reg, ZX_OFF_LC_SS0_USR, in zx_attach()
218 mapiodev(ca->ca_ra.ra_reg, ZX_OFF_LD_SS0, in zx_attach()
221 mapiodev(ca->ca_ra.ra_reg, ZX_OFF_LD_SS1, in zx_attach()
224 mapiodev(ca->ca_ra.ra_reg, ZX_OFF_LX_CROSS, in zx_attach()
227 mapiodev(ca->ca_ra.ra_reg, ZX_OFF_LX_CURSOR, in zx_attach()
253 ri->ri_bits = mapiodev(ca->ca_ra.ra_reg, in zx_attach()
Dcgfourteen.c257 &ca->ca_ra.ra_reg[CG14_REG_CONTROL], 0, ca->ca_ra.ra_len); in cgfourteenattach()
277 printf("%dMB, rev %d.%d", ca->ca_ra.ra_reg[CG14_REG_VRAM].rr_len >> 20, in cgfourteenattach()
280 sc->sc_phys = ca->ca_ra.ra_reg[CG14_REG_VRAM]; in cgfourteenattach()
291 sc->sc_vramsize = ca->ca_ra.ra_reg[CG14_REG_VRAM].rr_len; in cgfourteenattach()
294 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(&ca->ca_ra.ra_reg[CG14_REG_VRAM], in cgfourteenattach()
Drfx.c239 mapiodev(ca->ca_ra.ra_reg, RFX_RAMDAC_ADDR, RFX_RAMDAC_SIZE); in rfxattach()
241 mapiodev(ca->ca_ra.ra_reg, RFX_CONTROL_ADDR, RFX_CONTROL_SIZE); in rfxattach()
242 sc->sc_phys = ca->ca_ra.ra_reg[0]; in rfxattach()
266 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(ca->ca_ra.ra_reg, in rfxattach()
Dcgthree.c213 mapiodev(ca->ca_ra.ra_reg, CG3REG_REG, in cgthreeattach()
236 sc->sc_phys = ca->ca_ra.ra_reg[0]; in cgthreeattach()
248 sc->sc_sunfb.sf_ro.ri_bits = mapiodev(ca->ca_ra.ra_reg, CG3REG_MEM, in cgthreeattach()
Dp9100.c282 bcopy(ra->ra_reg, sc->sc_phys, sizeof(sc->sc_phys)); in p9100attach()
284 sc->sc_ctl = mapiodev(&ra->ra_reg[P9100_REG_CTL], 0, in p9100attach()
285 ra->ra_reg[P9100_REG_CTL].rr_len); in p9100attach()
286 sc->sc_cmd = mapiodev(&ra->ra_reg[P9100_REG_CMD], 0, in p9100attach()
287 ra->ra_reg[P9100_REG_CMD].rr_len); in p9100attach()
290 mapiodev(&ra->ra_reg[P9100_REG_CONFIG], 0, in p9100attach()
291 ra->ra_reg[P9100_REG_CONFIG].rr_len); in p9100attach()
354 ri->ri_bits = mapiodev(&ra->ra_reg[P9100_REG_VRAM], 0, in p9100attach()
355 sc->sc_vramsize = round_page(ra->ra_reg[P9100_REG_VRAM].rr_len)); in p9100attach()
/mirbsd/src/sys/arch/sparc/include/
Dautoconf.h72 } ra_reg[RA_MAXREG]; member
74 #define ra_iospace ra_reg[0].rr_iospace
75 #define ra_paddr ra_reg[0].rr_paddr
76 #define ra_len ra_reg[0].rr_len
/mirbsd/src/sys/arch/sparc/sparc/
Dclock.c247 i7 = (struct intersil7170 *) mapiodev(ra->ra_reg, 0, sizeof(*i7));
333 eeprom_va = (char *)mapiodev(ra->ra_reg, 0, EEPROM_SIZE);
406 cl = (struct clockreg *)mapiodev(ra->ra_reg, 0, 8192);
415 cl = (struct clockreg *)mapiodev(ra->ra_reg, 0,
489 (void)mapdev(&ra->ra_reg[ra->ra_nreg-1], TIMERREG_VA, 0,
491 (void)mapdev(&ra->ra_reg[0], COUNTERREG_VA, 0,
509 (void)mapdev(ra->ra_reg, TIMERREG_VA, 0,

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