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Searched refs:SF_CHIP_DBLR (Results 1 – 3 of 3) sorted by relevance

/mirbsd/src/sys/dev/pci/
Dsiop_pci_common.c107 SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
115 SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
123 SF_CHIP_FIFO | SF_CHIP_PF | SF_CHIP_RAM | SF_CHIP_DBLR |
156 SF_CHIP_LS | SF_CHIP_10REGS | SF_CHIP_DFBC | SF_CHIP_DBLR |
165 SF_CHIP_LS | SF_CHIP_10REGS | SF_CHIP_DFBC | SF_CHIP_DBLR | SF_CHIP_DT |
174 SF_CHIP_LS | SF_CHIP_10REGS | SF_CHIP_DFBC | SF_CHIP_DBLR | SF_CHIP_DT |
/mirbsd/src/sys/dev/ic/
Dsiopvar_common.h167 #define SF_CHIP_DBLR 0x00000400 /* clock doubler or quadrupler */ macro
Dsiop_common.c185 if (sc->features & (SF_CHIP_DBLR | SF_CHIP_QUAD)) {