| /mirbsd/src/gnu/usr.bin/binutils/opcodes/ |
| D | ia64-opc-a.c | 94 {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 0), {R1, R2, R3}, EMPTY}, 95 {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 1), {R1, R2, R3, C1}, EMPTY}, 96 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 1), {R1, R2, R3}, EMPTY}, 97 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 0), {R1, R2, R3, C1}, EMPTY}, 98 {"addp4", A, OpX2aVeX4X2b (8, 0, 0, 2, 0), {R1, R2, R3}, EMPTY}, 99 {"and", A, OpX2aVeX4X2b (8, 0, 0, 3, 0), {R1, R2, R3}, EMPTY}, 100 {"andcm", A, OpX2aVeX4X2b (8, 0, 0, 3, 1), {R1, R2, R3}, EMPTY}, 101 {"or", A, OpX2aVeX4X2b (8, 0, 0, 3, 2), {R1, R2, R3}, EMPTY}, 102 {"xor", A, OpX2aVeX4X2b (8, 0, 0, 3, 3), {R1, R2, R3}, EMPTY}, 103 {"shladd", A, OpX2aVeX4 (8, 0, 0, 4), {R1, R2, CNT2a, R3}, EMPTY}, [all …]
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| D | ia64-opc-i.c | 111 {"chk.s.i", I0, OpX3 (0, 1), {R2, TGT25b}, EMPTY}, 113 {"mov", I, OpX3XbIhWhTag13 (0, 7, 0, 0, 1, 0), {B1, R2}, PSEUDO, 0, NULL}, 115 I, OpX3XbIhWh (0, a, b, c, d), {B1, R2, TAG13b}, EMPTY 130 {"mov", I, OpX3 (0, 3), {PR, R2, IMM17}, EMPTY}, 132 {"mov", I, FULL17 | OpX3 (0, 3) | FULL17, {PR, R2}, PSEUDO, 0, NULL}, 136 {"mov.i", I, OpX3X6 (0, 0, 0x2a), {AR3, R2}, EMPTY}, 150 {"dep", I, Op (4), {R1, R2, R3, CPOS6c, LEN4}, EMPTY}, 152 {"shrp", I, OpX2X (5, 3, 0), {R1, R2, R3, CNT6}, EMPTY}, 162 {"shl", I, OpX2XYb (5, 1, 1, 0), {R1, R2, CPOS6a}, 164 {"dep.z", I, OpX2XYb (5, 1, 1, 0), {R1, R2, CPOS6a, LEN6}, EMPTY}, [all …]
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| D | v850-opc.c | 339 #define R2 (R1_NOTR0 + 1) macro 343 #define R2_NOTR0 (R2 + 1) 484 #define IF1 {R1, R2} 487 #define IF2 {I5, R2} 493 #define IF6 {I16, R1, R2} 496 #define IF6U {I16U, R1, R2} 544 { "sld.b", one (0x0300), one (0x0780), {D7, EP, R2}, 1, PROCESSOR_V850E1 }, 545 { "sld.b", one (0x0300), one (0x0780), {D7, EP, R2}, 1, PROCESSOR_V850E }, 546 { "sld.b", one (0x0300), one (0x0780), {D7, EP, R2}, 1, PROCESSOR_V850 }, 548 { "sld.h", one (0x0400), one (0x0780), {D8_7, EP, R2}, 1, PROCESSOR_V850E1 }, [all …]
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| D | ia64-opc-m.c | 107 {"mov.m", M, OpX3X6b (1, 0, 0x2a), {AR3, R2}, EMPTY}, 109 {"mov", M, OpX3X6b (1, 0, 0x2c), {CR3, R2}, PRIV, 0, NULL}, 115 {"mov", M, OpX3X6b (1, 0, 0x2d), {PSR_L, R2}, PRIV, 0, NULL}, 116 {"mov", M, OpX3X6b (1, 0, 0x29), {PSR_UM, R2}, EMPTY}, 119 {"probe.r", M, OpX3X6b (1, 0, 0x38), {R1, R3, R2}, EMPTY}, 120 {"probe.w", M, OpX3X6b (1, 0, 0x39), {R1, R3, R2}, EMPTY}, 126 {"itc.d", M0, OpX3X6b (1, 0, 0x2e), {R2}, LAST | PRIV, 0, NULL}, 127 {"itc.i", M0, OpX3X6b (1, 0, 0x2f), {R2}, LAST | PRIV, 0, NULL}, 129 {"mov", M, OpX3X6b (1, 0, 0x00), {RR_R3, R2}, PRIV, 0, NULL}, 130 {"mov", M, OpX3X6b (1, 0, 0x01), {DBR_R3, R2}, PRIV, 0, NULL}, [all …]
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| D | ia64-opc.h | 70 #define R2 IA64_OPND_R2 macro
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| /mirbsd/src/lib/libssl/src/crypto/md4/ |
| D | md4_dgst.c | 133 R2(A,B,C,D,X[ 0], 3,0x6ED9EBA1); in md4_block_host_order() 134 R2(D,A,B,C,X[ 8], 9,0x6ED9EBA1); in md4_block_host_order() 135 R2(C,D,A,B,X[ 4],11,0x6ED9EBA1); in md4_block_host_order() 136 R2(B,C,D,A,X[12],15,0x6ED9EBA1); in md4_block_host_order() 137 R2(A,B,C,D,X[ 2], 3,0x6ED9EBA1); in md4_block_host_order() 138 R2(D,A,B,C,X[10], 9,0x6ED9EBA1); in md4_block_host_order() 139 R2(C,D,A,B,X[ 6],11,0x6ED9EBA1); in md4_block_host_order() 140 R2(B,C,D,A,X[14],15,0x6ED9EBA1); in md4_block_host_order() 141 R2(A,B,C,D,X[ 1], 3,0x6ED9EBA1); in md4_block_host_order() 142 R2(D,A,B,C,X[ 9], 9,0x6ED9EBA1); in md4_block_host_order() [all …]
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| D | md4_locl.h | 152 #define R2(a,b,c,d,k,s,t) { \ macro
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| /mirbsd/src/lib/libssl/src/crypto/md5/ |
| D | md5_dgst.c | 133 R2(A,B,C,D,X[ 5], 4,0xfffa3942L); in md5_block_host_order() 134 R2(D,A,B,C,X[ 8],11,0x8771f681L); in md5_block_host_order() 135 R2(C,D,A,B,X[11],16,0x6d9d6122L); in md5_block_host_order() 136 R2(B,C,D,A,X[14],23,0xfde5380cL); in md5_block_host_order() 137 R2(A,B,C,D,X[ 1], 4,0xa4beea44L); in md5_block_host_order() 138 R2(D,A,B,C,X[ 4],11,0x4bdecfa9L); in md5_block_host_order() 139 R2(C,D,A,B,X[ 7],16,0xf6bb4b60L); in md5_block_host_order() 140 R2(B,C,D,A,X[10],23,0xbebfbc70L); in md5_block_host_order() 141 R2(A,B,C,D,X[13], 4,0x289b7ec6L); in md5_block_host_order() 142 R2(D,A,B,C,X[ 0],11,0xeaa127faL); in md5_block_host_order() [all …]
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| D | md5_locl.h | 164 #define R2(a,b,c,d,k,s,t) { \ macro
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| /mirbsd/src/sys/crypto/ |
| D | sha1.c | 43 #define R2(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0x6ED9EBA1+rol(v,5);w=rol(w,30); macro 79 R2(a,b,c,d,e,20); R2(e,a,b,c,d,21); R2(d,e,a,b,c,22); R2(c,d,e,a,b,23); in SHA1Transform() 80 R2(b,c,d,e,a,24); R2(a,b,c,d,e,25); R2(e,a,b,c,d,26); R2(d,e,a,b,c,27); in SHA1Transform() 81 R2(c,d,e,a,b,28); R2(b,c,d,e,a,29); R2(a,b,c,d,e,30); R2(e,a,b,c,d,31); in SHA1Transform() 82 R2(d,e,a,b,c,32); R2(c,d,e,a,b,33); R2(b,c,d,e,a,34); R2(a,b,c,d,e,35); in SHA1Transform() 83 R2(e,a,b,c,d,36); R2(d,e,a,b,c,37); R2(c,d,e,a,b,38); R2(b,c,d,e,a,39); in SHA1Transform()
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| /mirbsd/src/lib/libc/hash/ |
| D | sha1.c | 41 #define R2(v,w,x,y,z,i) z+=(w^x^y)+blk(i)+0x6ED9EBA1+rol(v,5);w=rol(w,30); macro 74 R2(a,b,c,d,e,20); R2(e,a,b,c,d,21); R2(d,e,a,b,c,22); R2(c,d,e,a,b,23); in SHA1Transform() 75 R2(b,c,d,e,a,24); R2(a,b,c,d,e,25); R2(e,a,b,c,d,26); R2(d,e,a,b,c,27); in SHA1Transform() 76 R2(c,d,e,a,b,28); R2(b,c,d,e,a,29); R2(a,b,c,d,e,30); R2(e,a,b,c,d,31); in SHA1Transform() 77 R2(d,e,a,b,c,32); R2(c,d,e,a,b,33); R2(b,c,d,e,a,34); R2(a,b,c,d,e,35); in SHA1Transform() 78 R2(e,a,b,c,d,36); R2(d,e,a,b,c,37); R2(c,d,e,a,b,38); R2(b,c,d,e,a,39); in SHA1Transform()
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| /mirbsd/src/lib/libssl/src/crypto/md5/asm/ |
| D | md5-586.pl | 93 sub R2 subroutine 238 &R2( 0,-1,$A,$B,$C,$D,$X,32, 4,0xfffa3942); 239 &R2( 1, 0,$D,$A,$B,$C,$X,33,11,0x8771f681); 240 &R2( 2, 0,$C,$D,$A,$B,$X,34,16,0x6d9d6122); 241 &R2( 3, 0,$B,$C,$D,$A,$X,35,23,0xfde5380c); 242 &R2( 4, 0,$A,$B,$C,$D,$X,36, 4,0xa4beea44); 243 &R2( 5, 0,$D,$A,$B,$C,$X,37,11,0x4bdecfa9); 244 &R2( 6, 0,$C,$D,$A,$B,$X,38,16,0xf6bb4b60); 245 &R2( 7, 0,$B,$C,$D,$A,$X,39,23,0xbebfbc70); 246 &R2( 8, 0,$A,$B,$C,$D,$X,40, 4,0x289b7ec6); [all …]
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| D | md5-sparcv9.S | 52 #define R2 %l2 macro 146 LOAD X(2),R2 160 add T1,R2,T1 != 527 !pre-LOADed X(2),R2 540 add T1,R2,T1 766 !pre-LOADed X(2),R2 778 add T1,R2,T1 964 !pre-LOADed X(2),R2 980 add T1,R2,T1 !=
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| /mirbsd/src/lib/libssl/src/crypto/bn/asm/ |
| D | mips1.s | 13 #define R2 $3 macro 47 lw R2,4(P1) 65 addu R2,R2,CC 66 sltu CC,R2,CC 68 addu R2,R2,L2 70 sltu L2,R2,L2 71 sw R2,4(P1) 285 lw R2,4(P3) 299 addu L2,L2,R2 300 sltu R2,L2,R2 [all …]
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| /mirbsd/src/gnu/usr.bin/binutils/include/opcode/ |
| D | i960.h | 114 #define R2 OP( 1, 0, 0, 0 ) macro 273 { 0x98000000, "ldl", I_BASE, MEM8, 2, { M, R2, 0 } }, 274 { 0x9a000000, "stl", I_BASE, MEM8, 2, { R2, M, 0 } }, 322 { R_2D(0x5dc), "movl", I_BASE, REG, 2, { RL2,R2, 0 } }, 339 { R_3(0x670), "emul", I_BASE, REG, 3, { RSL,RSL,R2 } }, 341 { R_2D(0x672), "cvtadr", I_CASIM,REG, 2, { RL, R2, 0 } }, 385 { R_2D(0x6c1), "cvtril", I_FP, REG, 2, { FL, R2, 0 } }, 387 { R_2D(0x6c3), "cvtzril", I_FP, REG, 2, { FL, R2, 0 } }, 448 { R_1D(0x673), "ldtime", I_MIL, REG, 1, { R2, 0, 0 } },
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| /mirbsd/src/gnu/usr.bin/binutils/gdb/ |
| D | vax-nat.c | 57 R0, R1, R2, R3, R4, R5,
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| D | m32r-stub.c | 121 { R0, R1, R2, R3, R4, R5, R6, R7, enumerator 286 gdb_write ((void *) registers[R2], registers[R3]); in handle_exception()
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| D | sh-stub.c | 263 R0, R1, R2, R3, R4, R5, R6, R7, enumerator
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| D | wince.c | 219 context_offset (R2), 350 context_offset (R2),
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| /mirbsd/src/gnu/usr.bin/perl/ext/Encode/t/ |
| D | at-cn.t | 113 '~{G1AzNpSC#,QtTZOBR2!#~} ~{<{AzTZLo#,5BJ)FUR2!#~} ~{VUHUG,G,#,74845@R2!#~}',
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| /mirbsd/src/gnu/usr.sbin/sendmail/contrib/ |
| D | mail.local.linux | 149 M#F'N0NPU9`9R2)_ZJTLF``JJ+_8EO-3?Y&()`<O\=;(_&.0@728<=:VO$&(Z
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| /mirbsd/src/gnu/usr.bin/binutils/cpu/ |
| D | ms1.cpu | 345 (indices keyword "" (("R0" 0) ("R1" 1) ("R2" 2) ("R3" 3) ("R4" 4) ("R5" 5)
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| /mirbsd/src/gnu/usr.bin/perl/pod/ |
| D | perlport.pod | 1255 As of R2.5 of USS for OS/390 and Version 2.3 of VM/ESA these Unix
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| /mirbsd/src/bin/mksh/ |
| D | check.t | 2064 # breaks on Dell UNIX 4.0 R2.2 (SVR4) where unlink also fails
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