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Searched refs:MID_MCSR_ENDMA (Results 1 – 2 of 2) sorted by relevance

/mirbsd/src/sys/dev/ic/
Dmidwayreg.h111 #define MID_MCSR_ENDMA 0x10 /* DMA enable */ macro
Dmidway.c971 EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* enable DMA (only) */
1027 EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* re-enable DMA (only) */
1053 EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA); /* re-enable DMA (only) */
1447 EN_WRITE(sc, MID_MAST_CSR, MID_SETIPL(sc->ipl)|MID_MCSR_ENDMA|