Searched refs:MID_DRQ_A2REG (Results 1 – 2 of 2) sorted by relevance
| /mirbsd/src/sys/dev/ic/ |
| D | midwayreg.h | 207 #define MID_DRQ_A2REG(N) (((N) - MID_DRQOFF) >> 3) macro
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| D | midway.c | 406 (SC)->drq[MID_DRQ_A2REG((SC)->drq_us)] = EN_DQ_MK(SLOT,LEN); \
413 EN_WRITE((SC), MID_DMA_WRRX, MID_DRQ_A2REG((SC)->drq_us)); \
1036 EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip+8));
1038 while (EN_READ(sc, MID_DMA_RDRX) == MID_DRQ_A2REG(sc->drq_chip)) {
1405 EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip));
1412 EN_WRITE(sc, MID_DMA_WRTX, MID_DRQ_A2REG(sc->dtq_chip));
2474 idx = MID_DRQ_A2REG(sc->drq_chip);/* where we last saw chip */
3179 sc->drq[MID_DRQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_RXVCI(reg),
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