Searched refs:IGP01E1000_GMII_FIFO (Results 1 – 2 of 2) sorted by relevance
| /mirbsd/src/sys/dev/pci/ |
| D | if_em_hw.c | 4165 if((ret_val = em_read_phy_reg(hw, IGP01E1000_GMII_FIFO, in em_setup_led()
4168 if((ret_val = em_write_phy_reg(hw, IGP01E1000_GMII_FIFO, in em_setup_led()
4217 if((ret_val = em_write_phy_reg(hw, IGP01E1000_GMII_FIFO, in em_cleanup_led()
5006 if((ret_val = em_read_phy_reg(hw, IGP01E1000_GMII_FIFO, &phy_data))) in em_set_d3_lplu_state()
5011 if((ret_val = em_write_phy_reg(hw, IGP01E1000_GMII_FIFO, phy_data))) in em_set_d3_lplu_state()
5032 if((ret_val = em_write_phy_reg(hw, IGP01E1000_GMII_FIFO, phy_data))) in em_set_d3_lplu_state()
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| D | if_em_hw.h | 1754 #define IGP01E1000_GMII_FIFO 0x14 /* GMII FIFO Register */ macro
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