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Searched refs:ED_P0_IMR (Results 1 – 3 of 3) sorted by relevance

/mirbsd/src/sys/dev/ic/
Ddp8390reg.h58 #define ED_P0_IMR 0x0f /* Interrupt Mask Register (write) */ macro
Ddp8390.c310 NIC_PUT(regt, regh, ED_P0_IMR,
/mirbsd/src/sys/dev/isa/
Dif_ed.c1841 NIC_PUT(iot, ioh, nicbase, ED_P0_IMR,