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Searched refs:CS4281_FCR0 (Results 1 – 2 of 2) sorted by relevance

/mirbsd/src/sys/dev/pci/
Dcs4281.c719 DPRINTF(("FCR0 =0x%08x(expected 0x81000f00)\n", BA0READ4(sc, CS4281_FCR0)));
1049 BA0WRITE4(sc, CS4281_FCR0, (BA0READ4(sc,CS4281_FCR0) & ~FCRn_FEN));
1065 BA0WRITE4(sc, CS4281_FCR0, dat32);
1066 BA0WRITE4(sc, CS4281_FCR0, dat32 | FCRn_FEN);
Dcs4281reg.h139 #define CS4281_FCR0 0x180 /* FIFO Control Register 0 */ macro