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Searched refs:TIED_TO (Results 1 – 25 of 27) sorted by relevance

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/freebsd-head/contrib/llvm-project/llvm/include/llvm/MC/
HDMCInstrDesc.h36 TIED_TO = 0, // Must be allocated the same register as specified value. enumerator
42 ((1 << MCOI::TIED_TO) | ((op) << (4 + MCOI::TIED_TO * 4)))
/freebsd-head/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
HDX86BaseInfo.h975 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
979 if (NumOps == 8 && Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0) in getOperandBias()
984 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
985 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1) in getOperandBias()
989 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
990 (Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1 || in getOperandBias()
991 Desc.getOperandConstraint(8, MCOI::TIED_TO) == 1)) in getOperandBias()
HDX86InstComments.cpp261 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1) in printMasking()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZHazardRecognizer.cpp127 MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in has4RegOps()
HDSystemZShortenInst.cpp69 if (MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 && in tieOpsIfNeeded()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
HDRISCVBaseInfo.h234 Desc.getOperandConstraint(Desc.getNumDefs(), MCOI::TIED_TO) == 0; in isFirstDefTiedToFirstUse()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/
HDRISCVAsmPrinter.cpp980 assert(MCID.getOperandConstraint(OpNo, MCOI::TIED_TO) == 0 && in lowerRISCVVMachineInstrToMCInst()
985 if (OutMCID.getOperandConstraint(OutMI.getNumOperands(), MCOI::TIED_TO) < in lowerRISCVVMachineInstrToMCInst()
HDRISCVISelDAGToDAG.cpp3886 MCOI::TIED_TO) == 0 && in performCombineVMergeAndVOps()
/freebsd-head/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
HDScheduleDAGSDNodes.cpp218 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1) in ClusterNeighboringLoads()
456 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in AddSchedEdges()
HDScheduleDAGFast.cpp252 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
HDScheduleDAGRRList.cpp1033 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in TryUnfoldSU()
2842 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { in canClobber()
3082 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1) in AddPseudoTwoAddrDeps()
HDInstrEmitter.cpp386 bool isTied = MCID.getOperandConstraint(Idx, MCOI::TIED_TO) != -1; in AddRegisterOperand()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
HDAMDGPUDisassembler.cpp729 MCOI::OperandConstraint::TIED_TO); in getInstruction()
875 OldIdx, MCOI::OperandConstraint::TIED_TO) == -1) { in isMacDPP()
879 MCOI::OperandConstraint::TIED_TO) == DST_IDX); in isMacDPP()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
HDAMDGPUBaseInfo.cpp669 assert(OpDesc.getOperandConstraint(Component::SRC0, MCOI::TIED_TO) == -1); in ComponentProps()
670 assert(OpDesc.getOperandConstraint(Component::SRC1, MCOI::TIED_TO) == -1); in ComponentProps()
671 auto TiedIdx = OpDesc.getOperandConstraint(Component::SRC2, MCOI::TIED_TO); in ComponentProps()
/freebsd-head/contrib/llvm-project/llvm/lib/CodeGen/
HDTargetInstrInfo.cpp206 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
211 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
HDMachineInstr.cpp280 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); in addOperand()
1590 int ExpectedTiedIdx = MCID.getOperandConstraint(I, MCOI::TIED_TO); in hasComplexRegisterTies()
HDMachineVerifier.cpp2420 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
2477 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO)) in visitMachineOperand()
/freebsd-head/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
HDUtils.cpp193 int DefIdx = I.getDesc().getOperandConstraint(OpI, MCOI::TIED_TO); in constrainSelectedInstRegOperands()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
HDAMDGPUAsmParser.cpp8535 MCOI::OperandConstraint::TIED_TO) == -1; in isRegOrImmWithInputMods()
9198 Desc.getOperandConstraint(OldIdx, MCOI::TIED_TO) == -1; in cvtVOP3DPP()
9238 MCOI::TIED_TO); in cvtVOP3DPP()
9310 MCOI::TIED_TO); in cvtDPP()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/X86/
HDX86InstrInfo.cpp3040 MCOI::TIED_TO) != -1)) { in findCommutedOpIndices()
7326 bool Tied1 = 0 == MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO); in commuteOperandsForFold()
7327 bool Tied2 = 0 == MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO); in commuteOperandsForFold()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
HDRISCVAsmParser.cpp3541 int TiedOp = MCID.getOperandConstraint(1, MCOI::TIED_TO); in validateInstruction()
/freebsd-head/contrib/llvm-project/llvm/include/llvm/Target/
HDTarget.td726 /// - MC/MCInstrDesc.h:OperandConstraint::{TIED_TO, EARLY_CLOBBER}.
/freebsd-head/contrib/llvm-project/llvm/lib/Target/PowerPC/
HDPPCInstrInfo.cpp1170 assert(MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 && in commuteInstructionImpl()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
HDARMDisassembler.cpp1020 int TiedOp = MCID.getOperandConstraint(VCCPos + 3, MCOI::TIED_TO); in AddThumbPredicate()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
HDAArch64AsmParser.cpp5283 (MCID.getOperandConstraint(i, MCOI::TIED_TO) == -1) && in validateInstruction()

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