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Searched refs:RS (Results 1 – 25 of 311) sorted by relevance

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/freebsd-head/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
HDResourceManager.cpp105 getStrategyFor(const ResourceState &RS) { in getStrategyFor() argument
106 if (RS.isAResourceGroup() || RS.getNumUnits() > 1) in getStrategyFor()
107 return std::make_unique<DefaultResourceStrategy>(RS.getReadyMask()); in getStrategyFor()
138 const ResourceState &RS = *Resources[Index]; in ResourceManager() local
139 if (!RS.isAResourceGroup()) { in ResourceManager()
180 ResourceState &RS = *Resources[Index]; in selectPipe() local
181 assert(RS.isReady() && "No available units to select!"); in selectPipe()
185 if (!RS.isAResourceGroup() && RS.getNumUnits() == 1) in selectPipe()
186 return std::make_pair(ResourceID, RS.getReadyMask()); in selectPipe()
188 uint64_t SubResourceID = Strategies[Index]->select(RS.getReadyMask()); in selectPipe()
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HDRegisterFile.cpp384 bool RegisterFile::canEliminateMove(const WriteState &WS, const ReadState &RS, in canEliminateMove() argument
386 const RegisterMapping &RMFrom = RegisterMappings[RS.getRegisterID()]; in canEliminateMove()
422 bool IsZeroMove = ZeroRegisters[RS.getRegisterID()]; in canEliminateMove()
450 const ReadState &RS = Reads[I]; in tryEliminateMoveOrSwap() local
452 if (!canEliminateMove(WS, RS, RegisterFileIndex)) in tryEliminateMoveOrSwap()
457 ReadState &RS = Reads[I]; in tryEliminateMoveOrSwap() local
460 const RegisterMapping &RMFrom = RegisterMappings[RS.getRegisterID()]; in tryEliminateMoveOrSwap()
467 RRIFrom.RenameAs ? RRIFrom.RenameAs : RS.getRegisterID(); in tryEliminateMoveOrSwap()
478 if (ZeroRegisters[RS.getRegisterID()]) { in tryEliminateMoveOrSwap()
480 RS.setReadZero(); in tryEliminateMoveOrSwap()
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/freebsd-head/contrib/llvm-project/llvm/lib/FuzzMutate/
HDRandomIRBuilder.cpp91 auto RS = makeSampler(Rand, make_filter_range(GlobalVars, MatchesPred)); in findOrCreateGlobalVariable() local
92 RS.sample(nullptr, 1); in findOrCreateGlobalVariable()
93 GlobalVariable *GV = RS.getSelection(); in findOrCreateGlobalVariable()
127 auto RS = makeSampler(Rand, make_filter_range(Insts, MatchesPred)); in findOrCreateSource() local
128 if (!RS.isEmpty()) { in findOrCreateSource()
129 return RS.getSelection(); in findOrCreateSource()
139 auto RS = makeSampler(Rand, make_filter_range(Args, MatchesPred)); in findOrCreateSource() local
140 if (!RS.isEmpty()) { in findOrCreateSource()
141 return RS.getSelection(); in findOrCreateSource()
153 auto RS = in findOrCreateSource() local
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HDIRMutator.cpp37 auto RS = makeSampler<Function *>(IB.Rand); in mutate() local
40 RS.sample(&F, /*Weight=*/1); in mutate()
42 while (RS.totalWeight() < IB.MinFunctionNum) { in mutate()
44 RS.sample(F, /*Weight=*/1); in mutate()
46 mutate(*RS.getSelection(), IB); in mutate()
71 auto RS = makeSampler<IRMutationStrategy *>(IB.Rand); in mutateModule() local
73 RS.sample(Strategy.get(), in mutateModule()
74 Strategy->getWeight(CurSize, MaxSize, RS.totalWeight())); in mutateModule()
75 if (RS.totalWeight() == 0) in mutateModule()
77 auto Strategy = RS.getSelection(); in mutateModule()
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/freebsd-head/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/
HDMIGChecker.cpp95 void checkReturnAux(const ReturnStmt *RS, CheckerContext &C) const;
106 void checkPreStmt(const ReturnStmt *RS, CheckerContext &C) const { in checkPreStmt() argument
107 checkReturnAux(RS, C); in checkPreStmt()
109 void checkEndFunction(const ReturnStmt *RS, CheckerContext &C) const { in checkEndFunction() argument
110 checkReturnAux(RS, C); in checkEndFunction()
249 void MIGChecker::checkReturnAux(const ReturnStmt *RS, CheckerContext &C) const { in checkReturnAux() argument
266 if (!RS) in checkReturnAux()
273 SVal V = C.getSVal(RS); in checkReturnAux()
288 R->addRange(RS->getSourceRange()); in checkReturnAux()
290 N, RS->getRetValue(), *R, in checkReturnAux()
HDMacOSXAPIChecker.cpp80 const MemSpaceRegion *RS = RB->getMemorySpace(); in CheckDispatchOnce() local
81 if (isa<GlobalsSpaceRegion>(RS)) in CheckDispatchOnce()
120 } else if (isa<HeapSpaceRegion>(RS)) { in CheckDispatchOnce()
122 } else if (isa<UnknownSpaceRegion>(RS)) { in CheckDispatchOnce()
HDMallocChecker.cpp180 static RefState getAllocatedOfSizeZero(const RefState *RS) { in getAllocatedOfSizeZero() argument
181 return RefState(AllocatedOfSizeZero, RS->getStmt(), in getAllocatedOfSizeZero()
182 RS->getAllocationFamily()); in getAllocatedOfSizeZero()
190 static RefState getEscaped(const RefState *RS) { in getEscaped() argument
191 return RefState(Escaped, RS->getStmt(), RS->getAllocationFamily()); in getEscaped()
727 const Expr *DeallocExpr, const RefState *RS,
1517 const RefState *RS = State->get<RegionState>(Sym); in ProcessZeroAllocCheck() local
1518 if (RS) { in ProcessZeroAllocCheck()
1519 if (RS->isAllocated()) in ProcessZeroAllocCheck()
1521 RefState::getAllocatedOfSizeZero(RS)); in ProcessZeroAllocCheck()
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/freebsd-head/contrib/llvm-project/llvm/lib/CodeGen/
HDShrinkWrap.cpp174 bool useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS,
177 const SetOfRegs &getCurrentCSRs(RegScavenger *RS) const { in getCurrentCSRs()
183 TFI->determineCalleeSaves(*MachineFunc, SavedRegs, RS); in getCurrentCSRs()
197 void updateSaveRestorePoints(MachineBasicBlock &MBB, RegScavenger *RS);
203 RegScavenger *RS);
208 RegScavenger *RS);
223 const TargetInstrInfo *TII, RegScavenger *RS);
298 bool ShrinkWrap::useOrDefCSROrFI(const MachineInstr &MI, RegScavenger *RS, in INITIALIZE_PASS_DEPENDENCY()
358 for (unsigned Reg : getCurrentCSRs(RS)) { in INITIALIZE_PASS_DEPENDENCY()
561 const TargetInstrInfo *TII, RegScavenger *RS) { in checkIfRestoreSplittable() argument
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HDRegisterScavenging.cpp339 static Register scavengeVReg(MachineRegisterInfo &MRI, RegScavenger &RS, in scavengeVReg() argument
382 Register SReg = RS.scavengeRegisterBackwards(RC, DefMI.getIterator(), in scavengeVReg()
393 RegScavenger &RS, in scavengeFrameVirtualRegsInBlock() argument
396 RS.enterBasicBlockEnd(MBB); in scavengeFrameVirtualRegsInBlock()
402 RS.backward(I); in scavengeFrameVirtualRegsInBlock()
422 Register SReg = scavengeVReg(MRI, RS, Reg, true); in scavengeFrameVirtualRegsInBlock()
424 RS.setRegUsed(SReg); in scavengeFrameVirtualRegsInBlock()
448 Register SReg = scavengeVReg(MRI, RS, Reg, false); in scavengeFrameVirtualRegsInBlock()
466 void llvm::scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS) { in scavengeFrameVirtualRegs() argument
482 bool Again = scavengeFrameVirtualRegsInBlock(MRI, RS, MBB); in scavengeFrameVirtualRegs()
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HDExpandReductions.cpp62 TargetTransformInfo::ReductionShuffle RS = in expandReductions() local
84 Rdx = getShuffleReduction(Builder, Vec, RdxOpcode, RS, RK); in expandReductions()
117 Rdx = getShuffleReduction(Builder, Vec, RdxOpcode, RS, RK); in expandReductions()
132 Rdx = getShuffleReduction(Builder, Vec, RdxOpcode, RS, RK); in expandReductions()
145 Rdx = getShuffleReduction(Builder, Vec, RdxOpcode, RS, RK); in expandReductions()
/freebsd-head/contrib/llvm-project/llvm/include/llvm/FuzzMutate/
HDRandom.h76 ReservoirSampler<ElT, GenT> RS(RandGen); in makeSampler()
77 RS.sample(Items); in makeSampler()
78 return RS; in makeSampler()
84 ReservoirSampler<T, GenT> RS(RandGen); in makeSampler()
85 RS.sample(Item, Weight); in makeSampler()
86 return RS; in makeSampler()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/XCore/
HDXCoreRegisterInfo.cpp95 int Offset, RegScavenger *RS ) { in InsertFPConstInst() argument
96 assert(RS && "requiresRegisterScavenging failed"); in InsertFPConstInst()
101 RS->scavengeRegisterBackwards(XCore::GRRegsRegClass, II, false, 0); in InsertFPConstInst()
102 RS->setRegUsed(ScratchOffset); in InsertFPConstInst()
164 unsigned Reg, int Offset, RegScavenger *RS ) { in InsertSPConstInst() argument
165 assert(RS && "requiresRegisterScavenging failed"); in InsertSPConstInst()
174 RS->scavengeRegisterBackwards(XCore::GRRegsRegClass, II, false, 0); in InsertSPConstInst()
175 RS->setRegUsed(ScratchBase); in InsertSPConstInst()
180 RS->scavengeRegisterBackwards(XCore::GRRegsRegClass, II, false, 0); in InsertSPConstInst()
181 RS->setRegUsed(ScratchOffset); in InsertSPConstInst()
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/freebsd-head/contrib/llvm-project/llvm/include/llvm/IR/
HDLLVMRemarkStreamer.h35 remarks::RemarkStreamer &RS; variable
42 LLVMRemarkStreamer(remarks::RemarkStreamer &RS) : RS(RS) {} in LLVMRemarkStreamer() argument
/freebsd-head/contrib/llvm-project/clang/include/clang/Analysis/
HDConstructionContext.h96 ConstructionContextItem(const ReturnStmt *RS) in ConstructionContextItem() argument
97 : Data(RS), Kind(ReturnKind) {} in ConstructionContextItem()
583 const ReturnStmt *RS; variable
587 const ReturnStmt *RS) in ReturnedValueConstructionContext() argument
588 : ConstructionContext(K), RS(RS) { in ReturnedValueConstructionContext()
590 assert(RS); in ReturnedValueConstructionContext()
594 const ReturnStmt *getReturnStmt() const { return RS; } in getReturnStmt()
611 explicit SimpleReturnedValueConstructionContext(const ReturnStmt *RS) in SimpleReturnedValueConstructionContext() argument
613 ConstructionContext::SimpleReturnedValueKind, RS) {} in SimpleReturnedValueConstructionContext()
636 const ReturnStmt *RS, const CXXBindTemporaryExpr *BTE) in CXX17ElidedCopyReturnedValueConstructionContext() argument
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/freebsd-head/contrib/llvm-project/llvm/lib/Target/ARC/
HDARCRegisterInfo.cpp41 int ObjSize, RegScavenger *RS, int SPAdj) { in replaceFrameIndex() argument
42 assert(RS && "Need register scavenger."); in replaceFrameIndex()
60 BaseReg = RS->FindUnusedReg(&ARC::GPR32RegClass); in replaceFrameIndex()
67 RS->scavengeRegisterBackwards(ARC::GPR32RegClass, II, false, SPAdj); in replaceFrameIndex()
73 RS->setRegUsed(BaseReg); in replaceFrameIndex()
165 RegScavenger *RS) const { in eliminateFrameIndex()
221 ObjSize, RS, SPAdj); in eliminateFrameIndex()
/freebsd-head/stand/efi/libefi/
HDefienv.c47 rv = RS->GetVariable(uv, g, &attr, &dl, data); in efi_getenv()
82 rv = RS->SetVariable(uv, guid, attr, len, data); in efi_setenv()
96 rv = RS->SetVariable(var, &FreeBSDBootVarGUID, in efi_setenv_freebsd_wcs()
117 rv = RS->SetVariable(var, guid, 0, 0, NULL); in efi_delenv()
/freebsd-head/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSIFrameLowering.h34 RegScavenger *RS = nullptr) const override;
36 RegScavenger *RS = nullptr) const;
59 RegScavenger *RS = nullptr) const override;
62 MachineFunction &MF, RegScavenger *RS = nullptr) const override;
HDSIRegisterInfo.cpp101 RegScavenger *RS; member
114 RegScavenger *RS) in SGPRSpillBuilder()
116 MI->getOperand(0).isKill(), Index, RS) {} in SGPRSpillBuilder()
120 bool IsKill, int Index, RegScavenger *RS) in SGPRSpillBuilder()
122 Index(Index), RS(RS), MBB(MI->getParent()), MF(*MBB->getParent()), in SGPRSpillBuilder()
172 assert(RS && "Cannot spill SGPR to memory without RegScavenger"); in prepare()
173 TmpVGPR = RS->scavengeRegisterBackwards(AMDGPU::VGPR_32RegClass, MI, false, in prepare()
191 RS->assignRegToScavengingIndex(TmpVGPRIndex, TmpVGPR); in prepare()
196 RS->setRegUsed(TmpVGPR); in prepare()
202 RS->setRegUsed(SuperReg); in prepare()
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/freebsd-head/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/
HDRegisterFile.h236 void collectWrites(const MCSubtargetInfo &STI, const ReadState &RS,
249 const ReadState &RS) const;
259 void addRegisterRead(ReadState &RS, const MCSubtargetInfo &STI) const;
269 bool canEliminateMove(const WriteState &WS, const ReadState &RS,
/freebsd-head/contrib/llvm-project/llvm/include/llvm/CodeGen/
HDRegAllocPBQP.h186 : RS(Other.RS), NumOpts(Other.NumOpts), DeniedOpts(Other.DeniedOpts), in NodeMetadata()
216 ReductionState getReductionState() const { return RS; } in getReductionState()
217 void setReductionState(ReductionState RS) { in setReductionState() argument
218 assert(RS >= this->RS && "A node's reduction state can not be downgraded"); in setReductionState()
219 this->RS = RS; in setReductionState()
224 if (RS == ConservativelyAllocatable) in setReductionState()
258 ReductionState RS = Unprocessed;
/freebsd-head/sys/contrib/device-tree/src/arm/marvell/
HDkirkwood-openrd.dtsi60 * SelRS232or485 selects between RS-232 or RS-485
63 * Low: RS-232
64 * High: RS-485
/freebsd-head/contrib/llvm-project/llvm/lib/Target/SystemZ/
HDSystemZFrameLowering.h73 RegScavenger *RS) const override;
84 RegScavenger *RS) const override;
130 RegScavenger *RS) const override;
153 RegScavenger *RS) const override;
/freebsd-head/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonBitSimplify.cpp82 RegisterSet(const RegisterSet &RS) = default;
189 : RS(S), TRI(RI) {} in PrintRegSet()
195 const RegisterSet &RS; member
203 for (unsigned R = P.RS.find_first(); R; R = P.RS.find_next(R)) in operator <<()
257 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
957 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy() argument
958 if (!RD.Reg.isVirtual() || !RS.Reg.isVirtual()) in isTransparentCopy()
965 return DRC == getFinalVRegClass(RS, MRI); in isTransparentCopy()
1095 bool usedBitsEqual(BitTracker::RegisterRef RD, BitTracker::RegisterRef RS);
1307 BitTracker::RegisterRef RS) { in usedBitsEqual() argument
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/freebsd-head/contrib/llvm-project/clang/lib/Analysis/
HDConstructionContext.cpp120 const auto *RS = cast<ReturnStmt>(ParentItem.getStmt()); in createBoundTemporaryFromLayers() local
121 assert(!RS->getRetValue()->getType().getCanonicalType() in createBoundTemporaryFromLayers()
123 return create<CXX17ElidedCopyReturnedValueConstructionContext>(C, RS, in createBoundTemporaryFromLayers()
189 const auto *RS = cast<ReturnStmt>(TopItem.getStmt()); in createFromLayers() local
190 return create<SimpleReturnedValueConstructionContext>(C, RS); in createFromLayers()
/freebsd-head/contrib/llvm-project/llvm/lib/MCA/
HDInstruction.cpp62 ReadState *RS = User.first; in onInstructionIssued() local
64 RS->writeStartEvent(IID, RegisterID, ReadCycles); in onInstructionIssued()
142 for (const ReadState &RS : getUses()) { in computeCriticalRegDep() local
143 const CriticalDependency &ReadCRD = RS.getCriticalRegDep(); in computeCriticalRegDep()

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